We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- …methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track record developing flows… more
- NVIDIA (Santa Clara, CA)
- …protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing ... We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC...micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Collaborate and coordinate with architects,… more
- NVIDIA (Santa Clara, CA)
- …+ Knowledge of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely considered to be the leader ... CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation, and timing closure by understanding arch/logic as well as… more
- Google (Mountain View, CA)
- …. + Lead and mentor a team of physical design engineers. + Drive the development and execution of the physical design flow , from netlist to GDSII. + ... integration. We are seeking a highly experienced and motivated Senior Physical Design CAD Manager to lead our physical...to lead our physical design team and drive the development of advanced integrated circuits. In this role, you… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... be responsible for the micro-architecture and design including RTL design, synthesis , functional verification and timing analysis using groundbreaking CAD tools and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, design ... and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks. What we… more
- NVIDIA (Santa Clara, CA)
- …and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis , timing analysis and ... We are now looking for a Senior Design for Debug (DFD) Architect and Methodology...work experience. + Experience in Computer Architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus… more
- Amazon (Cupertino, CA)
- …STA, and Sign-Off. - Proven track record of delivering metric driven PPA flow development and support. Preferred Qualifications - Expertise in high-performance, ... industry. As a member of the UC organization, you'll support the development and management of Compute, Database, Storage, Platform, and Productivity Apps services… more
- SpaceX (Sunnyvale, CA)
- …engineering or computer science + 5+ years of ASIC and/or physical design flow development experience in industry PREFERRED SKILLS AND EXPERIENCE: + Strong ... and capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg synthesis , floorplanning,… more
- Amazon (Sunnyvale, CA)
- Description Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a ... will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of...to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow . + Exhibit excellent communication skills and be ... + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding of fundamental physical design flows and stages +… more
- Google (Mountain View, CA)
- …lines between our functions), and communications. Our team partners with senior leadership to run important functions that cross-cut our existing organizations ... (GTM), partnerships, marketing, forward, reverse, and operations activities. + Drive the development of a Plan Of Record (POR) for activities that affect multiple… more