We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- SpaceX (Sunnyvale, CA)
- Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Google (Mountain View, CA)
- …or a related field, or equivalent practical experience. + 4 years of experience in Physical Design . + Experience in one or more synthesis/PnR tools (eg, Genus, ... + Experience with ASIC design flows and methodology of Physical design . + Experience in low power design Implementation including UPF/CPF,… more
- Google (Sunnyvale, CA)
- …generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a SoC Design Engineer , you will join a team working ... on SoC -level RTL design for our data center accelerators. You will ...and debug design RTL. + Work with physical design teams to ensure design...design RTL. + Work with physical design teams to ensure design meets … more
- Meta (Sunnyvale, CA)
- …on Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... Knowledge of geometry/process/device technology implications on physical design . 16. Experience with large SOC designs...physical design . 16. Experience with large SOC designs (>20M gates) with frequencies over 1GHZ. 17.… more
- Qualcomm (Santa Clara, CA)
- … engineering positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using ... technologies. You will be part of a team responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU,… more
- Meta (Sunnyvale, CA)
- …Experience in SoC bus and interconnect protocols 12. Knowledge of physical design and low-power implementation 13. Experience with high-speed I/O protocols ... power machine learning accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital… more
- Cisco (San Jose, CA)
- …foundries on installation and maintenance of process design kits (PDKs) for SOC physical design teams. * Experience working with Package and ... for verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with frontend,… more
- Broadcom (San Jose, CA)
- …Hands-on expertise with Physical verification and place-and-route tools for ASIC/ SoC design is essential **Education/Experience:** + BS degree in Electrical ... please Sign-In before you apply.** **Job Description:** Broadcom is looking for a Design Implementation Engineer with demonstrated expertise in key areas such as… more
- Qualcomm (Santa Clara, CA)
- …domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design and physical design teams to identify timing requirements ... clock domain crossing and design constraints to achieve timing closure of complex SoC cores. + Review and integrate HM constraints into SoC and ensure… more
- Broadcom (San Jose, CA)
- …accurate and efficient timing analysis and closure. Expertise in place-and-route tools for ASIC/ SoC design is a must. The ideal candidate should have strong ... Sign-In before you apply.** **Job Description:** Broadcom is looking for a ** Design Implementation Engineer ** with demonstrated expertise across key areas such… more
- Amazon (Sunnyvale, CA)
- …TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer , you will be part of an advanced architecture team that is exploring ... in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,...domains - Large breadth of knowledge from architecture through physical design - Knowledge of FPGA and… more
- Google (Sunnyvale, CA)
- …Spice simulations, clock verification, and signoff. Preferred qualifications: + Experience in ASIC physical design , physical design flows, and ... hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Circuits Design Engineer , Clock Design you will collaborate with… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... + Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design . +… more
- Amazon (Cupertino, CA)
- …architectures * Work with block designers to integrate DFT implementations * Work with physical design team to setup and implement DFT insertion flow * Develop ... years of practical DFT experience with large processor and/or SoC designs - Knowledge about industry standard tools and...or CS - Good breadth of knowledge in chip design from micro-architecture through physical design… more
- Amazon (Cupertino, CA)
- …Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & ... requirements including software applications, use models, system architecture and SoC architecture/micro-architecture solutions. * Participate in logic design … more
- General Motors (Mountain View, CA)
- …automaker on the planet. Our team delivers platform solutions for high end SoC 's which enables to run infotainment, ADAS and other high compute application. We ... Compute Platform Team is seeking an experienced Senior Software Engineer to join our team to work on high-compute...to join our team to work on high-compute System-on-Chip ( SoC ) platforms. The ideal candidate will have strong expertise… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... teams and vendors. **Preferred Qualifications:** Preferred Qualifications: 16. Experience with SOC Design Integration and Front-End Implementation. 17. Knowledge… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. 8. Interact with Physical Design Engineers and provide them with timing feedback. **Minimum ... teams and vendors. **Preferred Qualifications:** Preferred Qualifications: 16. Experience with SOC Design Integration & Front End Implementation 17. Experience… more
- Meta (Sunnyvale, CA)
- …Engineers in supporting them with the handoff tasks. 11. Interact with Physical Design Engineers and provide them with timing/congestion feedback. **Minimum ... to joining Meta **Preferred Qualifications:** Preferred Qualifications: 19. Experience in SOC Design Integration and Front-End Implementation. 20. Knowledge of… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... practical experience **Preferred Qualifications:** Preferred Qualifications: 17. Experience in SOC Design Integration and Front-End Implementation. 18. Knowledge… more