We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- SpaceX (Sunnyvale, CA)
- Sr . Synthesis & Front - End STA...COMPENSATION & BENEFITS: Pay range: Synthesis and Front - End STA Engineer/ Senior : $170,000.00 - ... ultimate goal of enabling human life on Mars. SR . SOC/ASIC SYNTHESIS & FRONT - END STA ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- Microsoft Corporation (Mountain View, CA)
- …of experience in synthesis , timing constraints and timing closure, front - end design checks, place-and-route and PPA tradeoffs. **Other Requirements:** ... thereafter. **Preferred Qualifications:** + Experience in collateral development including timing and synthesis constraints. + Experience in front - end design… more
- Amazon (Sunnyvale, CA)
- …to deliver high quality RTL -Ensure quality by running and tracking results of front - end tools including: Synthesis , Lint (RTL, DFT, UPF), Power Analysis ... and STA -Take the lead and work with verification teams to define functional coverage -Work with pre-silicon verification teams to assist in defining testplans/testbenches -Work with post-silicon validation teams to define and execute on testplans -Write high… more
- Amazon (Sunnyvale, CA)
- …design teams using various silicon processes - Develop, regress, and deploy digital front end flows including RTL static checks and design verification ... broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing...GDS methodology deployment experience - Digital design experience with Synthesis and back end hand off ownership… more
- Amazon (Sunnyvale, CA)
- …with Perl, Python, tcl, shell and drive to automate flows - Proficiency in chip front - end and back- end implementation tools such as Fusion compiler, Design ... latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on...Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis , Place & Route and other local/remote teams to… more
- Integense (San Jose, CA)
- …products in reliable mass production. + Experienced in all Front and Back End activities - RTL, Verification, Synthesis , STA, DFT, ATPG, etc. + Adept with ... our customers. We are expanding and looking for a Senior / Principal Member of Technical Staff, Digital Design....the digital design for multiple Battery Management products, full Front End and Back End … more
- Microsoft Corporation (Santa Clara, CA)
- …looking to hire a ** Senior Silicon Engineer** to join our Central Front - End Tools, Flows and Methodology (TFM **)** group. This team drives state-of-the-art ... Design Verification, Validation, Design for testing (DFT), Emulation, Design Synthesis , RTL Power Analysis, Physical Design ( PD) Handoff...and beyond. **Responsibilities** + Be part of a central Front End Computer Aided Design (FE CAD)… more
- NVIDIA (Santa Clara, CA)
- …diverse team crafting NVIDIA's chip design methodology! We're responsible for NVIDIA's front - end ASIC software including RTL synthesis , equivalence checking, ... architect highly automated and customizable design software incorporating logic/physical synthesis , design planning, and equivalence checking for industry-leading chip… more
- quadric.io, Inc (Burlingame, CA)
- …& Area (PPA) optimization + Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements: + BS/MS or Ph.D. in ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...Engineering with a minimum of five years of CPU/GPU/ASIC front - end design + Proficiency in SystemC, SystemVerilog,… more
- Microsoft Corporation (Santa Clara, CA)
- …is seeking a Senior Silicon Engineer - PCIe. You will join our front - end silicon team and be responsible for delivering cutting-edge, high performance, low ... power, scalable and programmable DPU silicon. As a Senior Silicon Engineer PCIe in the Data Processing Unit...bandwidth) design techniques + Knowledge of Verilog, System Verilog, Synthesis and Static Timing Analysis + Self-motivated and able… more
- Microsoft Corporation (Santa Clara, CA)
- …is seeking a Senior Silicon Silicon Engineer. You will join our front - end silicon team and be responsible for delivering cutting-edge, high performance, low ... power, scalable and programmable DPU silicon. **Responsibilities** + As a Senior Silicon Engineer in the Data Processing Unit team you will be validating silicon to… more
- NVIDIA (Santa Clara, CA)
- …and scalable manner + Identify inefficiencies and improvement opportunities in the front - end chip implementation process and propose ideas to tackle them ... + Own front - end design quality checks and reviews to...across functional teams to build consensus. + Experience in synthesis , padring, and physical design is a plus. The… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …learn and improve existing digital flows. The candidate will primarily be responsible for front - end coding, scripting and developing flows at all phases of the ... experience as well as a thorough understanding of the end -to- end digital design flow in order to...Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development… more
- NVIDIA (Santa Clara, CA)
- …responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, ... interacts with the floor-planning and back end teams to help craft the physical floorplan of...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in Perl or other… more
- Qualcomm (Santa Clara, CA)
- …design's post-layout functionality meets the intention of the netlist delivered by front - end designers * Collaboration: Working closely with cross-geo front ... processes, and an understanding of timing closure, clock tree synthesis , power optimization, and physical verification methodologies. Additionally, communication… more