• ASIC and/or FPGA Design

    The Boeing Company (Mountain View, CA)
    …& Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** at Lead, Senior & Principal ... across the company and around the world and support ASIC / FPGA design and verification...HDL coding, and physical design realization (through gate -level netlists for ASIC designs) + Integrate… more
    The Boeing Company (05/18/24)
    - Save Job - Related Jobs - Block Source
  • Systems Design Architect

    Cadence Design Systems, Inc. (San Jose, CA)
    …team's workflows. Skills + Must have at least 4 years of experience in managing ASIC design , integration, or verification teams. + Must have expertise in ... verification . + Experience in using UVM for functional verification of ASIC designs. + Experience with...Cadence and Synopsys for design simulation and verification . + Extensive experience with FPGA emulation,… more
    Cadence Design Systems, Inc. (04/25/24)
    - Save Job - Related Jobs - Block Source
  • Senior Principal Front End ASIC

    BAE Systems (San Jose, CA)
    …Engineering, Computer Engineering, or Computer Science + Proficient in Verilog language for Front End ASIC design , and related FPGA + Knowledge of ASIC ... chip designer who has strong proficiency in both + ASIC design - performing architecture design ,...verification methodologies (VCS simulator, UVM) + Proficient in ASIC / FPGA timing closure/area optimization techniques + Hands… more
    BAE Systems (06/07/24)
    - Save Job - Related Jobs - Block Source
  • Technical Program Manager, ASIC

    Meta (Menlo Park, CA)
    **Summary:** Meta is seeking a Technical Program Manager with ASIC / FPGA design and development experience. This Technical Program Manager (TPM) will lead ... details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification , physical… more
    Meta (04/16/24)
    - Save Job - Related Jobs - Block Source
  • FPGA Engineer

    Vector Atomic (Pleasanton, CA)
    …What We're Looking For + BSEE/MSEE Degree with substantial course/lab/intern work in FPGA / ASIC coding. Other technical degrees will be considered, with 2+ years ... in either VHDL, Verilog and/or SystemVerilog. + Develop end-to-end FPGA projects using vendor EDA tools for Xilinx, Altera...verification . + Writing assertions to validate an RTL design . + Coding for Formal Verification . +… more
    Vector Atomic (06/08/24)
    - Save Job - Related Jobs - Block Source
  • Design Verification Engineer

    Verilab (San Jose, CA)
    … experts. Founded in 2000, we specialize in solving the toughest functional verification problems for ASIC , FPGA and independent IP development. ... of consultants, providing clients with the very best in verification . You will be exposed to a diverse range...Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly… more
    Verilab (04/19/24)
    - Save Job - Related Jobs - Block Source
  • Senior Applications Engineer Digital…

    Siemens Digital Industries Software (Fremont, CA)
    …candidates who like to strategize, interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of ... technical validity of the solutions to achieve the customer's design and verification objectives * Keeps other...skills * Deep knowledge of semiconductor IC industry - ASIC , FPGA , SoC, Memory, Interconnect, CPU architectures,… more
    Siemens Digital Industries Software (05/09/24)
    - Save Job - Related Jobs - Block Source
  • Functional Verification Applications…

    Siemens Digital Industries Software (Fremont, CA)
    …for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL ... uncovering, scoping, and technical validity of the solutions to achieve the customer's design and verification objectives + Keeps other technical peers (country… more
    Siemens Digital Industries Software (06/08/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Design Lead, Devices and Services

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + 4 years of experience in ... people management, leading IP/SoC design team for low power SoCs. + Experience with...power SoCs. + Experience with ARM-based SoCs, interconnects, and ASIC methodology. Preferred qualifications: + Master's degree in Electrical/Computer… more
    Google (06/08/24)
    - Save Job - Related Jobs - Block Source
  • Senior Applications Engineer, DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …Experience on memory subsystem verification and/or performance analysis . Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... make an impact on the world of technology. Title Senior Applications Engineer - DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops… more
    Cadence Design Systems, Inc. (04/03/24)
    - Save Job - Related Jobs - Block Source
  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …thesis in a relevant area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on ... of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement...flow for the platform with other engineers. + Write Design Specifications and Unit Tests for your code Position… more
    Cadence Design Systems, Inc. (05/31/24)
    - Save Job - Related Jobs - Block Source