- Meta (Sunnyvale, CA)
- …of distance, and even the rules of physics. **Required Skills:** Design Verification Engineer , Silicon Engineering (University Grad) Responsibilities: 1. ... through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you... verification test benches to enable IP/sub-system/SoC level verification . 2 . Drive design verification … more
- Meta (Menlo Park, CA)
- …to Silicon bring up and validation. **Required Skills:** Hardware Systems Engineer , Silicon Responsibilities: 1. Working with end users to understand system ... **Summary:** Meta is seeking an Engineer to join our Release to Production (RTP)...the health and lifecycle of servers in production.The RTP Silicon squad's primary charter is to deliver scalable and… more
- Meta (Menlo Park, CA)
- …to Silicon bring up and validation. **Required Skills:** Hardware Systems Engineer , Silicon Responsibilities: 1. Working with end users to understand system ... **Summary:** Meta is seeking an Engineer to join our Release to Production (RTP)...the health and lifecycle of servers in production.The RTP Silicon squad's primary charter is to deliver scalable and… more
- Silicon Valley Power (Santa Clara, CA)
- **Principal Electric Utility Engineer ** Print (https://www.governmentjobs.com/careers/cityofsantaclaraca/jobs/newprint/4285881) **Principal Electric Utility ... Plan NA + Description + Benefits + Questions **Description** **The Department** Silicon Valley Power (SVP) is a not-for-profit electric municipal utility of Santa… more
- Silicon Valley Power (Santa Clara, CA)
- **Associate Engineer (Civil)** Print (https://www.governmentjobs.com/careers/cityofsantaclaraca/jobs/newprint/4262252) **Associate Engineer (Civil)** Salary ... before the position is closed.** **The Position** This announcement is for two ( 2 ) positions as described below: **Department of Public Works** The City of Santa… more
- Silicon Valley Power (Santa Clara, CA)
- **Senior Civil Engineer ** Print (https://www.governmentjobs.com/careers/cityofsantaclaraca/jobs/newprint/4420027) **Senior Civil Engineer ** Salary $154,897.80 ... + Benefits + Questions **Description** **The Position** This announcement is for two ( 2 ) positions as described below: **Department of Public Works** The City of… more
- Silicon Valley Power (Santa Clara, CA)
- …As a community owned, not for profit municipal electric utility, Silicon Valley Power (SVP) (https://www.siliconvalleypower.com/) has provided dependable electric ... is the only full service, vertically integrated publicly owned utility in Silicon Valley owning generation, transmission and distribution assets. As a Public… more
- Meta (Sunnyvale, CA)
- …with embedded C FW/SW development for pre- silicon verification and post- silicon bringup. 18. Master's degree in Electrical Engineer or Computer ... industry leading virtual and augmented reality systems.As a Design Verification Engineer (DVEs), you will be a...sufficient and detail oriented in all phases of Design Verification from IP to SoC level. 2 .… more
- Meta (Menlo Park, CA)
- …towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... verification test benches to enable IP/sub-system/SoC level verification . 2 . Develop functional tests based on… more
- Meta (Sunnyvale, CA)
- …towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities: 1. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....verification test plan. 2 . Drive Design Verification to closure based… more
- Meta (Sunnyvale, CA)
- …towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/SoC ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... verification test benches to enable block/IP/sub-system/SoC level verification 2 . Develop functional tests based on… more
- Meta (Sunnyvale, CA)
- …towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... verification test benches to enable IP/sub-system/SoC level verification 2 . Develop functional tests based on… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... (AR). Compute power requirements of Augmented Reality require custom silicon . Meta RL Silicon team is driving...multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers… more
- Meta (Sunnyvale, CA)
- …the entire stack, through algorithms to architecture, transistors to firmware. As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... for multiple state of the art graphics IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with cross-functional leads, including… more
- Qualcomm (Santa Clara, CA)
- …the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, ... Exposure with multiple succesfull tapeouts from conception to post silicon debug + Exposure to Formal verification ...Bachelor's degree in Science, Engineering, or related field and 2 + years of ASIC design, verification , validation,… more
- Meta (Sunnyvale, CA)
- …teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Lead the DV effort of ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....complex Compute/Networking IP's, from start to finish 2 . Define and implement complex Compute/Networking IP … more
- NVIDIA (Santa Clara, CA)
- As a Formal Verification Engineer at NVIDIA, you will verify the design and implementation of the industry's leading GPUs. In this position, your ... sufficiently bounded proofs while working with architects, designers, and pre- & post- silicon verification teams to accomplish your tasks. You will efficiently… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC ... plans, build verification test benches to enable IP/sub-system/SoC level verification . 2 . Develop functional tests based on verification test… more
- Qualcomm (Santa Clara, CA)
- …Responsible for verification of Graphics IP , and performing pre- and post- silicon verification to verify correctness and ensure performance and power goals ... GPU hardware, drivers, features, applications, and tools. + Creates and maintains verification test benches and environments in System Verilog/UVM + Create and… more
- Meta (Sunnyvale, CA)
- …, Firmware/Software development, to deliver first pass functional silicon on an aggressive schedule **Minimum Qualifications:** Minimum Qualifications: ... performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon . Reality Labs Silicon team is driving the state of the… more