- Google (Sunnyvale, CA)
- …Products. You will develop and automate system - level manufacturing test of ASIC 's and SoC 's to validate performance and screen out bad devices. You will ... with System Level Test or System validation. + Experience with ASIC or...focus on TPU architecture and its integration within AI/ML-driven systems . As a System Level … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- NVIDIA (Santa Clara, CA)
- … ASIC Design Engineers to design and implement the world's leading GPU and SoC 's. With the System - ASIC team, you will contribute to designing multiple ... ASIC designers, and verification engineers to design sophisticated system - level modules such as Floorsweep, In-silicon measurement,...teams in the silicon bring-up process and ensure successful SOC level integration. + You will also… more
- SanDisk (Milpitas, CA)
- …related field + 12+ years of experience in ASIC RTL design + Expert- level proficiency in Verilog/ System Verilog + Strong knowledge of Power Intent format ... Power domains + Collaborate with cross-functional teams to ensure seamless integration of ASIC designs into larger systems + Conduct thorough design reviews and… more
- NVIDIA (Santa Clara, CA)
- … System - level modules. What you'll be doing: + Be an integral part of the System ASIC Design team to help develop and improve our RTL and SOC designs ... self-driving cars and the growing field of artificial intelligence. System - ASIC team works closely with System...teams in the silicon bring-up process and ensure successful SOC level integration. + You will also… more
- Meta (Menlo Park, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification. 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....and/or C/C++ based verification. 10. 10+ years experience in IP/sub- system and/or SoC level verification… more
- Meta (Sunnyvale, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....and/or C/C++ based verification 10. 14+ years experience in IP/sub- system and/or SoC level verification… more
- Meta (Sunnyvale, CA)
- …success' in ASIC development cycles 9. 3+ years experience in block/IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... verification plans, build verification test benches to enable block/IP/sub- system / SoC level verification 2. Develop… more
- Meta (Sunnyvale, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification. 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... development cycles. 10. 5+ years of experience in IP/sub- system and/or SoC level verification… more
- Google (Mountain View, CA)
- …system /experience architects on meeting power, performance and area requirements at the SoC level for multimedia use cases and experiences. + Perform detailed ... field, or equivalent practical experience. + 3 years of experience in ASIC hardware architecture and silicon design. Preferred qualifications: + Master's degree or… more
- Cisco (San Jose, CA)
- …complex block, cluster or chip- level design * Lead verification for a complete SOC or ASIC i * Prior Experience with Forwarding logic/Parsers/P4 * Formal ... a bachelor's or master's degree * Prior experience with ASIC verification using UVM/ System Verilog. * Prior...Prior experience in verifying complex blocks, clusters and top level for SoC * Prior experience building… more
- Cisco (San Jose, CA)
- …advanced ASICs that integrate networking, compute, and storage into a single system . With tightly integrated hardware and software solutions, you'll gain exposure to ... all aspects of our systems , leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and a proven track record… more
- Qualcomm (Santa Clara, CA)
- …concepts and C or C++ programming skills. + 5+ years of experience with developing either SoC level or Sub- system level or Block- level testbench ... team is responsible for the complete verification lifecycle, from system - level concept to tape out and post-silicon...similar methodologies. + Experienced in developing IP or Subsystem level or SoC level test… more
- Meta (Sunnyvale, CA)
- …netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....for RTL-Synthesis and PrimeTime-STA for the blocks and the top- level including SOC . 2. Analyze the inter-block… more
- Meta (Sunnyvale, CA)
- …netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in… more
- Meta (Sunnyvale, CA)
- …close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable environments for Formal Verification and ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....with experience in Formal Verification to build IP and System On Chip ( SoC ) for data center… more
- Meta (Sunnyvale, CA)
- …netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...for RTL-Synthesis and PrimeTime-STA for the blocks and the top- level including SOC . 8. Analyze the inter-block… more
- Meta (Sunnyvale, CA)
- …netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...for RTL-Synthesis and PrimeTime-STA for the blocks and the top- level including SOC . Analyze the inter-block timing… more
- Tarana Wireless (Milpitas, CA)
- …teams to test the design on various emulation platforms + Work with Software and Systems teams on system verification and system integration + Writing test ... This position will challenge you! The Senior ASIC Engineer will work on complex ASIC...of Processors, Bus, Memory, and Interface IPs + Chip level integration and verification + RTL design and integration… more
- NVIDIA (Santa Clara, CA)
- …debug tools like Verdi, GDB) + Experience crafting test bench environments for unit and system level verification + Strong background in System Verilog or ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more