- Meta (Menlo Park, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /SoC verification ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop… more
- Meta (Sunnyvale, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...CDC, Synthesis, & Power Optimization 5. Soft and hard IP identification, selection and integration 6. Collaboration with verification… more
- Meta (Menlo Park, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Verilog, System Verilog and HLS. 4. Soft and hard IP identification, selection and integration. Collaboration with verification and… more
- Meta (Sunnyvale, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development. 2. RTL ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...CDC, Synthesis, & Power Optimization. 4. Soft and hard IP identification, selection and integration. 5. Collaboration with verification… more
- Meta (Sunnyvale, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Verilog, System Verilog and HLS 4. Soft and hard IP identification, selection and integration 5. Collaboration with verification… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... 3. Deliver physical design of an end-to-end IP or integration of ASIC /SoC design...to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Cisco (San Jose, CA)
- …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... of what's possible! Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...modes. * Option to also do block level RTL design or block or top-level IP integration.… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + 8 years of industry experience with IP design . + Experience with methodologies for low power estimation, timing ... or equivalent practical experience. + 5 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more
- Google (Mountain View, CA)
- …Science, with an emphasis on computer architecture. + 3 years of experience with Intellectual Property ( IP ) design for clocking, interconnects or ... experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages... techniques. + Experience with ARM-based SoCs, interconnects and ASIC methodology. + Experience with a scripting language like… more
- Amazon (Sunnyvale, CA)
- …and CMOS fabrication technology. Key job responsibilities - Evaluate 3rd party IP blocks - Estimate power, performance, and area for significant IPs early ... in design cycle - Execute on design specifications to deliver high quality RTL - Ensure quality by running and tracking results of front-end tools including:… more
- Qualcomm (Santa Clara, CA)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and methodology + 5+ years of… more
- Qualcomm (Santa Clara, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology + 3+ years of… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for our AR/MR products. We manage our ASIC design environment, develop methodologies and craft tools to streamline the design ... **Summary:** META is hiring ASIC Silicon Infrastructure Engineer within our...with internal infrastructure team on adapting Meta infrastructure/tooling to ASIC design solutions, including but not limited… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our ASIC vendor ... policy, timing corners, extraction, aging, and reliability metrics, for IP and SOC, from synthesis to Tape Out. 3....teams and with vendors Knowledge of front-end and back-end ASIC tools. 16. Experience with RTL design … more
- Meta (Sunnyvale, CA)
- …ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards creating a first-pass ... silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide...Experience to quickly understand and interpret specifications and extract design behaviors/properties 18. Experience in formal property … more