• ASIC Rtl Design

    Google (Sunnyvale, CA)
    …subsystem design architecture and microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC /SoC products according to ... of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design Engineer , you will play an important role in designing… more
    Google (05/06/25)
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  • ASIC Rtl Design

    Broadcom (San Jose, CA)
    …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... experience is a plus. + Experience in micro-architecture and RTL development. + Worked on architecture definitions on clocks,...in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills… more
    Broadcom (05/22/25)
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  • SoC RTL Design Engineer

    Google (Sunnyvale, CA)
    …and control subsystem's design microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC products according to established ... on computer architecture. + 5 years of experience in ASIC design with 3 years of experience...role, you will join a team working on SoC-level RTL design for our data center accelerators.… more
    Google (04/23/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... / flow experience + Fundamental digital design concepts and experience in ASIC design flow including RTL design , verification, logic synthesis and… more
    NVIDIA (03/20/25)
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  • ASIC Implementation Engineer

    Meta (Sunnyvale, CA)
    …Area. 12. Knowledge of front-end and back-end ASIC tools. 13. Experience with RTL design using SystemVerilog or other HDL. 14. Experience managing multiple ... (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1....Synthesis & Integration Engineer 11. Experience with RTL Synthesis and design optimization for Power,… more
    Meta (04/16/25)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture ... and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog...design of digital circuits using Verilog + Frontend design development and integration of large ASIC more
    Tarana Wireless (05/01/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
    NVIDIA (03/12/25)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design more
    SpaceX (04/15/25)
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  • Principal Engineer , ASIC

    Palo Alto Networks (Santa Clara, CA)
    …is to create an environment where we all win with precision. **Your Career** As a Design engineer on the ASIC team, you will create complex digital logic ... close collaboration with the Systems Architecture team + Implement RTL designs in SystemVerilog + Ensure that designs meet...military experience required + Minimum 8 years experience in ASIC design + Demonstrated success in taking… more
    Palo Alto Networks (05/17/25)
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  • ASIC Design Engineer

    Cisco (San Jose, CA)
    …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... of what's possible! Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. * Option to also do block level RTL design or block or top-level IP… more
    Cisco (04/19/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is seeking an ASIC Engineer , Design to join our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, ... engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Design Responsibilities: 1....Design Responsibilities: 1. Work on Micro-architecture development and Design / RTL coding 2. Work with design more
    Meta (05/08/25)
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  • Senior ASIC Design Engineer

    Arrow Electronics (San Jose, CA)
    **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
    Arrow Electronics (05/16/25)
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  • ASIC Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to improve RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and… more
    Google (04/10/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
    Meta (03/12/25)
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  • ASIC Design Engineer

    Broadcom (San Jose, CA)
    …be challenged and gain valuable experience towards enhancing a successful career in ASIC design . You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis, static timing...have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with… more
    Broadcom (04/26/25)
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  • ASIC Design Verification…

    Qualcomm (Santa Clara, CA)
    …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and...and methodology + 3+ years of experience with digital design concepts and RTL languages such as… more
    Qualcomm (04/09/25)
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  • ASIC Design For Test Engineer

    Cisco (San Jose, CA)
    …center, metro, long-haul and ultra-long haul telecommunication networks. This role is within our ASIC team, specifically as part of the Design for Test group. ... Your Impact As a member of Acacia's ASIC team, you will set up and implement MBIST,...work with seasoned DFT engineers to implement and verify Design For Test. * You will also interact with… more
    Cisco (03/21/25)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
    Meta (04/09/25)
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  • Senior ASIC Design Engineer

    Cisco (San Jose, CA)
    …* Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering ... micro-architecture specifications and participate in reviews. * Implement Verilog RTL to meet timing, performance, and power requirements. *...with 4+ years of ASIC design experience * Prior experience working… more
    Cisco (05/02/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to ...Systems design . + A deep understanding of ASIC design flow including RTL ... be doing: + As a key member of our design team, you will be responsible for the micro-architecture...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (05/02/25)
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