- Google (Sunnyvale, CA)
- …or a related field, or equivalent practical experience. + 2 years of experience with System Level Test (SLT) or product engineering. + Experience with ASIC ... benefits. Learn more about benefits at Google. + Develop System Level Test (SLT) solutions for custom... Test (SLT) solutions for custom Application-Specific Integrated Circuits ( ASIC ) and SoC 's by specifying hardware and… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- NVIDIA (Santa Clara, CA)
- … ASIC Design Engineers to design and implement the world's leading GPU and SoC 's. With the System - ASIC team, you will contribute to designing multiple ... ASIC designers, and verification engineers to design sophisticated system - level modules such as Floorsweep, In-silicon measurement,...teams in the silicon bring-up process and ensure successful SOC level integration. + You will also… more
- NVIDIA (Santa Clara, CA)
- … ASIC Design Engineers to design and implement the world's leading GPU and SoC 's. With the System - ASIC team, you will contribute to designing multiple ... architects, ASIC designers, and verification engineers to design sophisticated system - level modules such as Floorsweep, In-silicon measurement, Reset and… more
- NVIDIA (Santa Clara, CA)
- … System - level modules. What you'll be doing: + Be an integral part of the System ASIC Design team to help develop and improve our RTL and SOC designs ... self-driving cars and the growing field of artificial intelligence. System - ASIC team works closely with System...teams in the silicon bring-up process and ensure successful SOC level integration. + You will also… more
- Meta (Sunnyvale, CA)
- …Chip ( SoC ) verification plans, build verification test benches to enable block/IP/sub- system / SoC level verification 2. Develop functional tests based on ... SystemVerilog/UVM methodology or C/C++ based verification 8. 3+ years experience in block/IP/sub- system and/or SoC level verification based on SystemVerilog… more
- Meta (Sunnyvale, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....and/or C/C++ based verification 10. 8+ years experience in IP/sub- system and/or SoC level verification… more
- Meta (Sunnyvale, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....C/C++ based verification 9. 6+ years of experience in IP/sub- system and/or SoC level verification… more
- Cisco (San Jose, CA)
- …complex block, cluster or chip- level design + Lead verification for a complete SOC or ASIC i + Prior Experience with Forwarding logic/Parsers/P4 + Formal ... a bachelor's or master's degree + Prior experience with ASIC verification using UVM/ System Verilog. + Prior...Prior experience in verifying complex blocks, clusters and top level for SoC + Prior experience building… more
- Cisco (San Jose, CA)
- Technical Leader ASIC Design - Prototyping Apply (https://jobs.cisco.com/jobs/Login?projectId=1439389) + Location:San Jose, California, US + Area of InterestEngineer ... advanced ASICs that integrate networking, compute, and storage into a single system . With tightly integrated hardware and software solutions, you'll gain exposure to… more
- Meta (Sunnyvale, CA)
- …for large complex disaggregated ASICs. Your expertise will help us build an efficient System on Chip ( SoC ) and IP for data center applications. **Required ... **Summary:** Meta is hiring Application-Specific Integrated Circuit Engineer ( ASIC ) Methodology Engineer our Infrastructure organization, where you'll play a… more
- Google (Sunnyvale, CA)
- …As a Design Engineer, you will play an important role in designing ASIC / SoC hardware for Artificial Intelligence (AI) and networking accelerators that drive ... . + Work separately and collaboratively to create and review ASIC / SoC subsystem design architecture and microarchitecture specifications. + Develop… more
- Meta (Sunnyvale, CA)
- …close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable environments for Formal Verification and ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....with experience in Formal Verification to build IP and System On Chip ( SoC ) for data center… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... and testbenches to simulate FPGA components. + Establish prototyping systems in the lab and contribute to defining, evolving,...supporting our prototyping methodology. + **Option to engage in block- level RTL design or block or top- level … more
- Tarana Wireless (Milpitas, CA)
- …teams to test the design on various emulation platforms + Work with Software and Systems teams on system verification and system integration + Writing test ... thought impossible. This position will challenge you! The Senior ASIC Design Engineer will work on complex ASIC...of Processors, Bus, Memory, and Interface IPs + Chip level integration and verification + RTL design and integration… more
- Meta (Sunnyvale, CA)
- …of 'first-pass success' in ASIC development cycles. 9. 3. Experience in block/IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM ... block/IP/ SoC verification plans, build verification test benches to enable block/IP/sub- system / SoC level verification. 2. Develop functional tests based… more
- Cisco (San Jose, CA)
- …and UVM methodology + Prior experience in verifying complex blocks, clusters and top level for SoC + Prior experience building test benches from scratch, hands ... ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444952) + Location:San...on experience with System Verilog constraints, structures and classes. + Prior experience… more
- NVIDIA (Santa Clara, CA)
- …teammate are huge plus + Experience in crafting test bench environments for unit and system level verification NVIDIA is widely considered to be one of the ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
- NVIDIA (Santa Clara, CA)
- …tools like Verdi, GDB) + Experience in crafting test bench environments for unit and system level verification + Strong background in Verilog / System ... We're now looking for an ASIC Verification Engineer - New College Grad! NVIDIA...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
- NVIDIA (Santa Clara, CA)
- …debug tools like Verdi, GDB) + Experience crafting test bench environments for unit and system level verification + Strong background in System Verilog or ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more