• ATE Test Engineer

    Google (Mountain View, CA)
    …and mixed signal test and automation methodologies and support internal tools for ATE test program generation, test vector tracking, test program ... OTP programming, memory repair and validation methodologies and processes. + Experience with ATE test platforms and measurement equipment, with a preference for… more
    Google (05/22/25)
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  • Silicon System Level Test

    NVIDIA (Santa Clara, CA)
    …across diverse industries. NVIDIA's Silicon Solutions Group (SSG) seeks a Test Development Engineer to join our Hardware Architecture Development (HW ... and system Product of Record (POR) alignment. As a Test Prototyping Engineer , you will create new...stage for testing GPU/CPU hardware features. This could be ATE , socketed or board-level system test , rack-level… more
    NVIDIA (04/23/25)
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  • Senior Silicon Product Engineer

    Google (Mountain View, CA)
    …you will help develop and deploy a comprehensive test solution using Automatic Test Equipment ( ATE ) for high volume manufacturing at FABs, OSATs that meets ... part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer... hardware design (eg, probe card, Load board) requirements, ATE / SLT test program review. +… more
    Google (04/22/25)
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  • Principal Silicon Circuits System Design…

    NVIDIA (Santa Clara, CA)
    …techniques and board PDN design knowledge to hardware features, design requirements, silicon characterization needs, and test requirements. + Design essential ... difference in the world through their inventions. As part of the Silicon Solutions Team, we architect and deliver groundbreaking solutions for productizing NVIDIA's… more
    NVIDIA (04/15/25)
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  • Senior Silicon Product Definition…

    NVIDIA (Santa Clara, CA)
    …difference in the world through their inventions. As part of the Silicon Solutions Team, we architect and deliver groundbreaking solutions for productizing NVIDIA's ... and automotive markets. What you will be doing: + Analyze pre-production silicon in innovative process technologies for performance, power, yield, and quality to… more
    NVIDIA (05/15/25)
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  • Senior Silicon Power Performance…

    NVIDIA (Santa Clara, CA)
    …what's possible and make groundbreaking impacts. What you'll be doing: The Senior Silicon Power Performance Engineer focuses on developing and productizing power ... The Silicon Solutions Group (SSG) is where innovation meets...team to further improve modelling & analysis infrastructure , test procedure, improve & implement new methodologies. + Work… more
    NVIDIA (05/20/25)
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  • Senior Silicon Product Definition…

    NVIDIA (Santa Clara, CA)
    …is an industry leader in high-performance computing, gaming, and AI. As part of the Silicon Solutions Team we seek a Senior Product Definition Engineer . Our team ... targets, trade-off features/configurations, and provide innovative solutions to sophisticated silicon and system-level problems. + Evaluate Performance, power, yield,… more
    NVIDIA (03/13/25)
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  • Senior Test Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …individual who understand ASIC and SoC test methodology, DFT techniques, NPI and ATE test program development and release. The individual will turn the ... test methodology into ATE test ...work experience in the semiconductor industry. + Knowledge of silicon verification, testing and manufacturing + Have knowledge in… more
    NVIDIA (05/04/25)
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  • Test Development Engineer

    Qualcomm (Santa Clara, CA)
    …degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. The test engineer develops automated production test solutions ... volume production as well as improving the existing solutions. **Key Responsibilities:** + Develop ATE test program and integrate various test functions in… more
    Qualcomm (03/27/25)
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  • Sr Product Test Development Engineer

    Cisco (San Jose, CA)
    …You're Impact You will be a Sr Product Test Development Engineer in Silicon Operations focusing on the ATE test bring-up including defining test ... with ASIC design teams in the Central Hardware Group, peer Test and Product Engineers in Silicon Operations, and with Cisco Systems NPI teams. Collaborate with… more
    Cisco (05/01/25)
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  • Senior Test Engineer

    Power Integrations (San Jose, CA)
    …specifications and DFT proposals. + Create test programs in C language, debug and validate silicon on ATE + Design test interface hardware for ATE + ... of test solution and improve cost of test . + Supports and is responsible for sustaining and...and skills with regard to software C++ programming + ATE experience on Mixed Signal Tester preferably on ASL1K… more
    Power Integrations (03/20/25)
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  • Senior System Level Product Engineer

    NVIDIA (Santa Clara, CA)
    …to deliver extraordinary solutions in a wide range of sectors. We are seeking post- silicon Senior System Level Product Engineer who is passionate and committed ... the world through their inventions. As part of the Silicon Solutions Team, we are responsible for productizing NVIDIA's...this team, you are responsible for developing procedures and test specs for manufacturing line with an innate understanding… more
    NVIDIA (04/15/25)
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  • ASIC Design For Test Engineer

    Cisco (San Jose, CA)
    …* You will work with seasoned DFT engineers to implement and verify Design For Test . * You will also interact with RTL/PD/STA/ ATE , collaborating with them for a ... ASIC team, specifically as part of the Design for Test group. Your Impact As a member of Acacia's...with hierarchical ATPG and core wrapping techniques, ATPG and post- silicon DVT * Prior experience with Synopsys/Mentor DFT tools… more
    Cisco (03/21/25)
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  • ASIC Reliability Engineer

    Cisco (San Jose, CA)
    …components and modules, and reliability testing. * Statistical data analysis, ATE test data interpretation, device level electrical characterization, and ... * 10+ years of experience with the Semiconductor, manufacturing process, IC test methodologies, device reliability, silicon /package fail mechanisms and symptoms.… more
    Cisco (05/23/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    test quality of the products from Design to Production + Participate/contribute in silicon bring-up, characterization, and silicon test + Define and ... complex and cutting edge network switching ASIC DFx (Design for Test /debug & manufacturability) from DFT architecture, to implementation, verification, timing… more
    Broadcom (03/11/25)
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  • Senior ASIC Engineer - DFX

    NVIDIA (Santa Clara, CA)
    …simulation, and diagnosis + Experience with Silicon testing and Automatic Test Equipment ( ATE ) + Expertise in using programming languages for automation ... We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows...methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and … more
    NVIDIA (04/26/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    …place-n-route and power, to ensure we are making the right trade-offs + Experience in Silicon debug and bring-up on the ATE with an understanding of pattern ... We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over...and intelligence. Make the choice to join us today. Design-for- Test Engineering at NVIDIA works on groundbreaking innovations involving… more
    NVIDIA (05/22/25)
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  • Staff Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    …analog circuits, device physics and IC fabrication processes. + Ability to interpret IC ATE test data log is required. Ability to interpret system level ... Job Description: The Staff Silicon Level Failure Analysis Engineer will...product failures in power supply applications and/or in production test . + Provide comprehensive technical reports to customers on… more
    Power Integrations (04/22/25)
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  • Senior HSIO Validation Engineer

    NVIDIA (Santa Clara, CA)
    …to our company and usher in the next wave of computing. NVIDIA's Silicon Solutions Group is responsible for crafting NVIDIA's GPUs and SoCs into groundbreaking ... + Coordinate with logic design, circuit design, board design, Simulation, diagnostics, ATE , firmware, driver, and marketing teams to drive the chip into production.… more
    NVIDIA (05/22/25)
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  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …place-n-route and power, to ensure we are making the right trade-offs + Experience in Silicon debug and bring-up on the ATE with an understanding of pattern ... imagination and intelligence. Make the choice to join us today. Design-for- Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative… more
    NVIDIA (03/13/25)
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