- SanDisk (Milpitas, CA)
- …at transistor level and gate level for leading-edge 3D NAND flash memory focusing on high - speed datapath circuit design and page buffers. + Perform block ... chip circuit simulations to meet all performance specifications. + RTL design , synthesis, static timing analysis and...a big advantage PREFERRED: + Knowledge and/or experience in High speed I/O circuit is a big… more
- Broadcom (San Jose, CA)
- …Engineering or Computer Engineering with 10+ years of experience in high speed ADC based SerDes RTL design .** + **Proficient with Verilog-HDL/System ... you apply.** **Job Description:** **Broadcom is looking for a high - speed DSP SerDes RTL designer....such as NCVerilog, NCSIM, Simvision, Lint.** + **Exposure to Design for test, understanding of scan concept and writing… more
- Arrow Electronics (Santa Clara, CA)
- …+ Extensive knowledge of SerDes technology, including understanding its operation, design challenges, and integration into high - speed communication ... **Position:** RTL Design Engineer (eInfochips) **Job Description:** **Role: RTL Design Engineer** **Location: San Jose CA (Remote)** **Experience: 10+… more
- Amazon (Sunnyvale, CA)
- …without reliable connectivity. Come work at Amazon! We're hiring a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design ... customer requirements and wireless system teams to define modems, high - speed interfaces, embedded processors, and DSP solutions...in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …SerDes exp.) will be considered. Position Requirements This team is focused on DSP and/or High Speed Serdes . The ideal candidate will have at least 10 plus ... join a dynamic and growing team of engineers developing high - speed PMA layer IP for industry-standard protocols....limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification… more
- NVIDIA (Santa Clara, CA)
- …components/protocols for compute, fabric, memory, and attached devices. + Strong background in RTL design developing high - speed digital blocks. + ... on the world. Join NVIDIA as a Senior SoC Design Engineer developing innovative SoC solutions. What you'll be...experience). + 10+ years of relevant work experience in RTL development passionate about CPU, GPU, and HPC architectures.… more
- NVIDIA (Santa Clara, CA)
- Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High - Speed I/O SerDes group, you'll lead a team ... leadership role + Expertise in Verilog or SystemVerilog, logic design , and circuit modeling in RTL for...algorithms (FFE, DFE, CTLE, CDR, offset cancellation), understanding of high - speed SerDes I/O digital design ,… more
- NVIDIA (Santa Clara, CA)
- …degree in Electrical Engineering or equivalent experience. + 5+ years of experience in high - speed digital design , proficient with front-end design flow ... Make the choice to join us today. The mixed-signal high - speed I/O group delivers innovative PHY designs...and adaptation algorithms, which then will be translated into RTL and firmware designs. For backend design ,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA has pioneered visual computing, the art ... Doing: + You will be working on architecture and design of our state-of-the-art high speed...PCIE , SerDes + Experience and knowledge in architecture, RTL design , performance analysis and power optimization.… more
- NVIDIA (Santa Clara, CA)
- … and timing team to evaluate Clocking concerns and develop solutions for supporting high speed Clocking. + Together with other team members, we deliver clock ... skills and ability to collaborate with multiple teams. + Experience in RTL design (Verilog), verification and logic synthesis. + Strong coding skills in python… more
- Meta (Sunnyvale, CA)
- …placement and routing, to improve performance and power 5. Work with the RTL design team to understand partition architecture and drive physical aspects ... the design cycle 6. Interface with the RTL design team to drive design...UPF/CPF knowledge 20. Experience in planning, implementing, and analyzing high - speed clock distribution networks. Experience with alternate… more
- NVIDIA (Santa Clara, CA)
- …industry standard physical design tools is required. + A background in high - speed interconnect/cache physical design is preferred. + Verilog expertise is ... 5+ years of experience in processor or other related high -performance semiconductor designs. + Physical design expertise...required as is a deep understanding of ASIC design flow including RTL design ,… more
- Google (Fremont, CA)
- …field, or equivalent practical experience. + 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Learn more aboutbenefits at Google (https://careers.google.com/benefits/) . **Responsibilities** + Design and develop RTL using SystemVerilog for various… more
- Microsoft Corporation (Mountain View, CA)
- …operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners ... Manufacturing Engineering** _(CSME)_ organization within _SCHIE_ is responsible for design , development, manufacturing and packaging of Microsoft's state-of-the-art computer… more
- Texas Instruments (Santa Clara, CA)
- …world. Love your job.** In this position, you will be working on high - speed mixed-signal communication circuits using state-of-the art process technology, as ... well as be involved in the design of high performance digital circuits interfacing...coding, simulation, synthesis, timing closure, verification, evaluation, debugging of high - speed communication chips both at the circuit… more
- Google (Sunnyvale, CA)
- …low-power implementation (UPF/CPF). + Experience in integrating and ensuring closure for high - speed IP subsystems. + Experience with evaluating foundry process ... to drive architectural feasibility studies, develop timing, power and area design goals, and explore RTL / design tradeoffs for physical design closure. +… more
- Cadence Design Systems, Inc. (San Jose, CA)
- … Printed circuit boards in Schematic and layout level. Familiarity with peripheral chips, high speed interface design techniques, Signal and Power integrity ... to make an impact on the world of technology. Design Engineering Director -HPP The role will be a...Layer and Protocol layer experience on AT LEAST ONE High speed SERDES on Ethernet/ PCIe/CXL/UCIe/ *… more
- NVIDIA (Santa Clara, CA)
- …position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis and timing analysis using ... NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team!...years of relevant industry experience and a background in high - speed coherent interconnects, protocol bridges, hardware-managed coherency… more
- NVIDIA (Santa Clara, CA)
- …you will have the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis, functional verification and timing ... NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team!...a plus. + Relevant experience and a background in high - speed coherent interconnects, protocol bridges, hardware-managed coherency… more
- Amazon (Sunnyvale, CA)
- …a constellation of Low Earth Orbit satellites that will provide low-latency, high - speed broadband connectivity to unserved and underserved communities around the ... team works with customer requirements and wireless system teams to define modems, high - speed interfaces, embedded processors, and DSP solutions in latest CMOS… more
