- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers...design of an end-to-end IP or integration of ASIC / SoC design and point out ... ) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities:...Knowledge of geometry/process/device technology implications on physical design . 16. Experience with large SOC designs… more
- SanDisk (Milpitas, CA)
- … development + Contribute to the development of best practices and methodologies for ASIC design within the organization + Optimize designs for power efficiency, ... architectures using advanced RTL techniques + Develop and optimize SoC subsystems, including CPU complex, DDR, Host, Flash, Debug,...design optimization + Proficiency in EDA tools for ASIC design and verification + Knowledge of… more
- Meta (Sunnyvale, CA)
- …( ASIC Development tools, Compute/Storage/Licensing management,etc.) and/or CAD Methodology ( Physical Design , Timing Methodology, Physical Verification, ... and Enterprise Engineering teams on adapting FB infrastructure to ASIC design solutions, including but not limited...Experience managing environments for concurrent development of IP and SOC releases and working with cross functional teams to… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... teams and vendors. **Preferred Qualifications:** Preferred Qualifications: 16. Experience with SOC Design Integration and Front-End Implementation. 17. Knowledge… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. 8. Interact with Physical Design Engineers and provide them with timing feedback. **Minimum ... teams and vendors. **Preferred Qualifications:** Preferred Qualifications: 16. Experience with SOC Design Integration & Front End Implementation 17. Experience… more
- Meta (Sunnyvale, CA)
- …Engineers in supporting them with the handoff tasks. 11. Interact with Physical Design Engineers and provide them with timing/congestion feedback. **Minimum ... to joining Meta **Preferred Qualifications:** Preferred Qualifications: 19. Experience in SOC Design Integration and Front-End Implementation. 20. Knowledge of… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... practical experience **Preferred Qualifications:** Preferred Qualifications: 17. Experience in SOC Design Integration and Front-End Implementation. 18. Knowledge… more
- Cisco (San Jose, CA)
- …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL... Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture specifications and participate in reviews… more
- Meta (Sunnyvale, CA)
- …for Power, Performance, and Area 18. 2. Floor Planning and Placement 19. 3. Physical Design Execution for Clock Tree Synthesis and Routing optimization 20. 4 ... to Job" online on this web page. **Required Skills:** ASIC Engineer, Implementation Responsibilities: 1. Run logic/ physical ...domain crossing checks. 9. Understand reset-architecture and work with design & FW teams to develop reset groups and… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence...with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out… more
- Google (Sunnyvale, CA)
- …or Computer Science, with an emphasis on computer architecture. + 5 years of experience in ASIC design with 3 years of experience working on security design . ... experiences, delivering unparalleled performance, efficiency, and integration. As a SoC Design Engineer, you will join a...and debug design RTL. + Work with physical design teams to ensure design… more
- Google (Mountain View, CA)
- …convergence, including STA and sign-off. Preferred qualifications: + Experience with ASIC design flows and methodology of Physical design . + Experience ... equivalent practical experience. + 4 years of experience in Physical Design . + Experience in one or...Performance, Area and Power. + Develop all aspects of ASIC RTL2GDS implementation for designs. + Manage physical… more
- Qualcomm (Santa Clara, CA)
- …future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design ... be part of a team responsible for the complete Physical Design Flow and deliveries of complex,...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
- Qualcomm (Santa Clara, CA)
- …domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design and physical design teams to identify timing requirements ... design constraints to achieve timing closure of complex SoC cores. + Review and integrate HM constraints into...Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related… more
- Meta (Sunnyvale, CA)
- …Experience in SoC bus and interconnect protocols 12. Knowledge of physical design and low-power implementation 13. Experience with high-speed I/O protocols ... Work cross-functionally with adjacent chip-level teams such as Verification, Physical Design , and Design -for-Test **Minimum...design uArchitecture and RTL coding 9. Experience in SoC integration and ASIC architecture 10. Experience… more
- Cisco (San Jose, CA)
- …foundries on installation and maintenance of process design kits (PDKs) for SOC physical design teams. * Experience working with Package and ... verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation...Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification * Experience… more
- Broadcom (San Jose, CA)
- …Hands-on expertise with Physical verification and place-and-route tools for ASIC / SoC design is essential **Education/Experience:** + BS degree ... and physical verification. This role involves contributing to sophisticated design implementations using the latest technology nodes, while also leading one or… more
- Google (Sunnyvale, CA)
- …Experience in Spice simulations, clock verification, and signoff. Preferred qualifications: + Experience in ASIC physical design , physical design ... Design you will collaborate with the architecture, logic design DFT, physical design , and...Law in advanced technology nodes and deliver cutting edge ASIC 's and SoC 's. You will drive block… more