- NVIDIA (Santa Clara, CA)
- …optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and ... amplify human inventiveness and intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's...ASIC design flow including RTL design, verification, logic synthesis and timing analysis + Strong coding skills in… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's...The team is also handling the architecture, design, and synthesis of multiple System-level modules. What you'll be doing:… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. + Exposure to Digital systems and VLSI design,… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1443694) + Location:San Jose, California, US + Area of InterestEngineer - ... provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis, ECO, and post silicon debug. + Strong interpersonal skills… more
- Tarana Wireless (Milpitas, CA)
- …the digital divide in ways previously thought impossible. This position will challenge you! The Senior ASIC Design Engineer will work on complex ASIC ... + 5-12 years of experience in SoC design + Experience with Synthesis , Lint, CDC and other standard ASIC development tools + Proficient in Verilog and C + Working… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree...multi-million gate designs across multiple FPGAs. + Proficiency in ** synthesis , place, and route flows for FPGAs.** + **An… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing and power convergence,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams + Work on generating test plans and… more
- Palo Alto Networks (Santa Clara, CA)
- …deliver the digital logic that powers our next-generation firewall platforms. As a Senior Principal Engineer , you will take end-to-end ownership of complex ... less experienced team members. This role requires a deep technical background in ASIC design for networking applications and the ability to independently drive major… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, and ... flows and methodologies. + Familiarity with methodology and tools, logic synthesis , equivalence checking. + Strong interpersonal and communication skills and ability… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, verification engineers and interact with cross-functional software… more
- NVIDIA (Santa Clara, CA)
- …methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs ... design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams..., Tcl, C/C++ + Knowledge or experience with logic synthesis , physical design, formal equivalence checking. + Proven track… more
- Amazon (Sunnyvale, CA)
- …provide low-latency, high-speed broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and ... verification methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable digital design teams to meet… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Logic Design Engineer ! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and ... of ASIC design flow including RTL design, verification, logic synthesis , prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. +… more
- NVIDIA (Santa Clara, CA)
- …GPUs and SOCs on standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, ... RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. + Improve performance of...or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi,… more
- Microsoft Corporation (Santa Clara, CA)
- …Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer . You will join our front-end silicon team and be ... low power, scalable and programmable DPU silicon. As a Senior Silicon Engineer in the Data Processing...micro-architecture specification and RTL development of design modules for ASIC memory subsystem. + Review and provide feedback on… more
- Google (Mountain View, CA)
- …concepts, and languages, such as Verilog or SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as ... Engineering, Computer Engineering or Computer Science. + Experience with ASIC design methodologies for clock domain checks, reset checks...Knowledge of FPGA and emulation platforms. + Knowledge of ASIC Verification or DFT. Be part of a team… more