- Microsoft Corporation (Mountain View, CA)
- …high-performance Azure cloud servers, clients, and augmented reality. We are looking for a ** Principal Design Verification Engineer ** to work on leading ... team in execution of project milestones. + 8+ years of experience in design verification with full verification cycle on complex System on Chip(SoC) IPs… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is currently seeking a verification engineer with strong fundamentals of design verification methodology and random test generators for CPU ... for verification engineers as needed + Collaborate with global architecture/ design / verification teams for execution and prioritization + Drive continuous… more
- Siemens Digital Industries Software (Fremont, CA)
- **Job Family:** Customer Services **Req ID:** 431392 As a Principal Customer Training Engineer , you will be responsible for all aspects of training delivery and ... using and strong working knowledge of physical verification , circuit verification , reliability verification , design for manufacturing, or interfaces… more
- Skyworks (San Jose, CA)
- Sr. Principal Analog Design Engineer Apply now " Date:Aug 25, 2024 Location: San Jose, CA, US Company: Skyworks If you are looking for a challenging and ... the way the world communicates. Requisition ID: 72766 Sr. Principal Analog Design Engineer Are...and dedicated team of world-class analog, mixed-signal and digital design and verification engineers committed to building… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence...+ Develop examples and best practices for SoC system design , verification , and testbenches for CSG IP.… more
- BAE Systems (San Jose, CA)
- …Other incentives may be available based on position level and/or job specifics. **Senior Principal Front End ASIC Design Engineer (Hybrid)** **105684BR** EEO ... Join us! In this role you can apply your expertise in Front End Digital design for ASICs driving our latest sensors highlighted by their low read noise capabilities.… more
- Skyworks (San Jose, CA)
- Sr. Principal RFIC Design Engineer Apply now " Date:Sep 5, 2024 Location: San Jose, CA, US Company: Skyworks If you are looking for a challenging and ... Market:San JoseNearest Secondary Market:Palo Alto Job Segment: Front End, Design Engineer , Network, Telecom, Telecommunications, Technology, Engineering Apply… more
- Qualcomm (Santa Clara, CA)
- …degree in Science, Engineering, or related field and 2+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's ... Engineering, or related field and 1+ year of ASIC design , verification , validation, integration, or related work...plus - WIFI Physical layer knowledge is a plus ** Principal Duties & Responsibilities:** - Verify WiFi Physical layer… more
- Qualcomm (Santa Clara, CA)
- …verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification ... processes of diagnosis/detection; some limited data analysis may be required. ** PRINCIPAL DUTIES AND RESPONSIBILITIES:** + Applies Graphics knowledge and experience… more
- Micron Technology, Inc. (San Jose, CA)
- …team members _Maintain Technical Expertise and provide training_ * Define best known design and verification practices and communicate to the entire department * ... up to achieve basic functionality * Responsible for delivering design simulation including post layout * Create verification... design simulation including post layout * Create verification plan for new and existing features and check… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …for front-end coding, scripting and developing flows at all phases of the digital design and functional verification . It is further expected that the candidate ... + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + IP integration and verification + Familiar… more
- City and County of San Francisco (San Francisco, CA)
- …the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Principal Information Systems Engineer - Networks Specialty are only ... that integrate these systems together as an enterprise networking backbone. The 1044 Principal Networks Engineer is the highest level in the Engineer… more
- City and County of San Francisco (San Francisco, CA)
- …minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Principal Information Systems Engineer - Applications Specialty are only ... that integrate these systems together as an enterprise networking backbone. The 1044 Principal Applications Engineer is the highest level in the Engineer… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …an impact on the world of technology. As a core member of the PHY Design team, your responsibilities will span across various aspects for the ASIC frontend flow, ... timing analysis (STA), timing closure, power optimization, and physical verification for both of block and Chip top level...will also be responsible for interfacing with the Physical Design team on STA, timing closure and P&R, and… more
- Cirtec Medical (Santa Clara, CA)
- …requirements, timelines, and deliverables with a focus on prototypes, process development, and design verification . JOB SUMMARY We are actively looking for a ... Principal Mechanical Engineer Department: LG Engineering...test method validations + Leading dFMEA creation + Coordinating design verification activities + Communicating technical risks… more
- Silicon Valley Power (Santa Clara, CA)
- ** Principal Electric Utility Engineer ** Print (https://www.governmentjobs.com/careers/cityofsantaclaraca/jobs/newprint/4285881) ** Principal Electric ... engaging, and highly qualified professional for one (1) management position of Principal Electric Utility Engineer in our Utility Operations Division. The… more
- Capgemini (San Francisco, CA)
- …front-end design related tasks. . Drive project milestones across the design , verification , and physical implementations. . Manage interface with Value Chain ... terms of architecture, micro-architecture, synthesis, timing closure, top level test plans, and verification . . 15 years' experience with SoC design (Digital … more
- TE Connectivity (San Francisco, CA)
- Principal Signal Integrity Engineer - Data & Devices At TE, you will unleash your potential working with people from diverse backgrounds and industries to create ... sustainable and more connected world. **Job Overview** As a Principal Signal Integrity Engineer for TE Connectivity...for TE Connectivity you will focus on the electrical design , simulation, and verification -validation testing of high… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …debug skills Experience in writing scripts (Perl, Python or Tcl) Strong software, HDL design and verification skills Ability to quickly analyze verification ... the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead...R&D, provide in-depth technical assistance to help support advanced verification flows to secure design wins Champion… more
- Skyworks (Milpitas, CA)
- …role, the RF Engineer will be responsible for planning, design , analysis, simulation, verification , documentation, support, and release to production ... Staff/ Principal RF Electrical Engineer Apply now...Engineer Seeking a highly technical, motivated, and experienced Engineer for RF component design and RF… more