- Google (Austin, TX)
- … memory subsystem design . + 10 years of experience in high-performance CPU , cache subsystem or AI accelerator logic/RTL design including ... . + Lead and manage a team of design engineers working on CPU , cache subsystem , or AI accelerator design and integration into SoC, emphasizing… more
- Google (Austin, TX)
- …+ 10 years of experience in high-performance CPU , cache subsystem or AI accelerator logic/RTL design including microarchitecture definition and PPA ... . + Lead and manage a team of design engineers working on CPU , cache subsystem , or Artificial Intelligence (AI) accelerator design and integration… more
- IBM (Austin, TX)
- …for the pre-silicon functional and performance verification of our chipsets, covering the CPU core, cache /nest subsystem , memory hierarchy, and other ... and problem debug. Verification is performed at various levels within the design hierarchy. A background in Computer Engineering or Electrical Engineering with… more
- Qualcomm (Austin, TX)
- …CPU and SOC level micro-architectures. You will work on a selected part of the CPU Design Verification to ensure that it functions to the standards of being ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer,… more
- IBM (Austin, TX)
- …for the pre-silicon functional and performance verification of our chipsets, covering the CPU core, cache /nest subsystem , memory hierarchy, and other ... and problem debug. Verification is performed at various levels within the design hierarchy. A background in Computer Engineering or Electrical Engineering with… more