- Qualcomm (San Diego, CA)
- … ASIC engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
- Qualcomm (San Diego, CA)
- …with mixed-signal IPs, such as SerDes, DDR, and Die-to-Die links - Experience in low - power digital design - Experience in creating tools and automation flows (in ... Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing...- Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist… more
- Qualcomm (San Diego, CA)
- …designers at various levels to help with designing high-speed, high-performance and low - power mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... applications. QCT mixed-signal design team consists of architects and ASIC designers, protocol experts, signal processing engineers, and algorithm designers… more
- Amazon (San Diego, CA)
- …implementation. * Experience in leading physical design. * Strong exposure to UPF flow for low power design. * Strong written and verbal skills * Experience of ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...flow for various technology nodes. * Work with the ASIC design and DFT teams to understand the design… more
- Qualcomm (San Diego, CA)
- …integrated circuit designers at various levels to help with designing high-performance and low - power mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... design by course selections and/or work experience. + Experience working with ASIC design tools such as Cadence Virtuoso. **Preferred Qualifications** + Several… more
- Amazon (San Diego, CA)
- …any necessary support logic . Configure, instantiate and integrate 3rd party IP blocks . Understand low power design & the impact of DFT on the blocks . Perform ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to develop world-class SOC and IP blocks, which meet power , area and performance targets. . Define, configure and… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, ... IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, ... IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional… more
- Qualcomm (San Diego, CA)
- …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... is where you come in. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC...the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the quality… more
- Qualcomm (San Diego, CA)
- …a team responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU, Camera and other MM, DDR, Modem, ... create a smarter, connected future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical.... Tasks also involve the development and enablement of low power implementation methods, customized P&R to… more
- Qualcomm (San Diego, CA)
- …using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level ... VCFormal, Jaspergold, 0In and others. **Preferred Qualifications:** + Experience with Low power design verification, Formal verification and Gate level… more
- Qualcomm (San Diego, CA)
- …analysis concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage/ power islands, power ... of advanced methodologies in die-level IR drop, STA, and power . The engineer should be proficient in...Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, ... IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional… more
- Qualcomm (San Diego, CA)
- …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... smarter, connected future for all. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC...the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the quality… more
- Meta (San Diego, CA)
- …14. Experience in SoC integration and ASIC architecture 15. Experience with low power design and optimization, including UPF flow. 16. Experience with NoC, ... Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital microarchitecture and design for low -...to ASIC digital microarchitecture and design for low - power interconnect and power management… more
- Meta (San Diego, CA)
- …skills to implement and contribute to the development and optimization of low power machine learning accelerators and state-of-the-art SoCs. **Required Skills:** ... Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital...and interconnect protocols 12. Knowledge of physical design and low - power implementation 13. Experience with high-speed I/O… more
- Qualcomm (San Diego, CA)
- …Electrical Engineering + Demonstrable knowledge and experience in Digital Signal processing + ASIC frontend development for low power applications + Hardware ... for it with a particular focus on meeting aggressive power and area targets. You will work with engineers...Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Qualcomm (San Diego, CA)
- …and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power , multi voltage designs. The successful candidate will help in ... create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will...advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power and multi voltage domain designs.… more
- Qualcomm (San Diego, CA)
- …a Senior candidate for the position to perform of SoC Debug Engineer for Server/Compute/Mobile chipsets. **Key Responsibilities:** In this role, the candidate will ... of server hardware, including motherboards, processors, memory, storage devices, power supplies, and networking components. + Investigate manufacturing defects,… more
- Qualcomm (San Diego, CA)
- …& Emulation** **Responsibilities:** + Perform Silicon bring-up, measure Post-Si Vmin/Fmax, Power , thermal data, correlate, characterize and analyze at the system ... level across various PVTs and SoC IPs + Debug low -level software and hardware issues, utilizing various debug tools...DDR, NOCs, etc.), basic RTL, and exposure to transistor power fundamentals + Knowledge of regression and PVT (Process,… more