• Low Power ASIC

    Qualcomm (San Diego, CA)
    ASIC engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
    Qualcomm (05/17/25)
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  • Digital ASIC Design Engineer

    Qualcomm (San Diego, CA)
    …with mixed-signal IPs, such as SerDes, DDR, and Die-to-Die links - Experience in low - power digital design - Experience in creating tools and automation flows (in ... Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing...- Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist… more
    Qualcomm (04/19/25)
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  • Analog/Mixed Signal ASIC Design…

    Qualcomm (San Diego, CA)
    …integrated circuit designers at various levels to help with designing high-performance and low - power mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... design by course selections and/or work experience. + Experience working with ASIC design tools such as Cadence Virtuoso. **Preferred Qualifications** + Several… more
    Qualcomm (04/23/25)
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  • Sr. ASIC Modem Design Engineer

    Amazon (San Diego, CA)
    …communities around the world. Come work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing… more
    Amazon (06/05/25)
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  • Sr. CAD Engineer , ASIC

    Amazon (San Diego, CA)
    Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...experience with emphasis on methodology and best practice - Power estimation and optimization - Back end tool experiences… more
    Amazon (06/11/25)
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  • Low Power Design/Methodology…

    Qualcomm (San Diego, CA)
    …block-level power models. **Required for this Role** : + 3 years of experience doing low power digital ASIC design. + Familiar with ASIC front-end ... design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks. + Work… more
    Qualcomm (05/15/25)
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  • SOC Power Design Engineer

    Qualcomm (San Diego, CA)
    …transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, ... IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional… more
    Qualcomm (06/13/25)
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  • SoC Power /Performance Post-Si Validation…

    Qualcomm (San Diego, CA)
    …field _plus_ **6 years of experience.** + **Required Skills:** + Understanding of SoC Power Delivery Network architectures, Low Power Design Techniques for ... one or more commercially available emulation platforms and deep familiarity with ASIC power estimation, analysis, and optimization, as well as industry-standard… more
    Qualcomm (06/04/25)
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  • Signal and Power Integrity Engineer

    Qualcomm (San Diego, CA)
    …transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, ... IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional… more
    Qualcomm (03/21/25)
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  • Server Chipset Power Engineer

    Qualcomm (San Diego, CA)
    …are highly optimized for the needs of the server product. **Position: Server Chipset Power Engineer ** We are seeking a highly experienced Server Chipset Power ... passion for architecting and designing complex, high performance and low power designs at advanced process nodes,... and silicon/system limits + Strong fundamentals in digital ASIC design and power of CMOS circuits… more
    Qualcomm (05/08/25)
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  • GPU Power Systems Engineer

    Qualcomm (San Diego, CA)
    …Experience with scripting in Python or Perl. + 5+ years of experience with low - power ASIC optimization **Preferred Qualifications:** + Master's or PhD degree ... of experience with VLSI design and verification + 8+ years of experience with low - power ASIC design techniques + Experience with industry tools such as… more
    Qualcomm (06/03/25)
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  • SOC Verification and Methodology Engineer

    Qualcomm (San Diego, CA)
    …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... is where you come in. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC...the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the quality… more
    Qualcomm (05/14/25)
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  • Physical Design Engineer

    Qualcomm (San Diego, CA)
    …a team responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU, Camera and other MM, DDR, Modem, ... create a smarter, connected future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical.... Tasks also involve the development and enablement of low power implementation methods, customized P&R to… more
    Qualcomm (04/22/25)
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  • Design Verification Engineer

    Qualcomm (San Diego, CA)
    …using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level ... VCFormal, Jaspergold, 0In and others. **Preferred Qualifications:** + Experience with Low power design verification, Formal verification and Gate level… more
    Qualcomm (04/19/25)
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  • Design Methodology Engineer

    Qualcomm (San Diego, CA)
    …analysis concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage/ power islands, power ... of advanced methodologies in die-level IR drop, STA, and power . The engineer should be proficient in...Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.… more
    Qualcomm (05/01/25)
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  • SOC Verification and Methodology Engineer

    Qualcomm (San Diego, CA)
    …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... smarter, connected future for all. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC...the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the quality… more
    Qualcomm (04/18/25)
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  • Heterogeneous Integration Engineer , Sr.…

    Qualcomm (San Diego, CA)
    …transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, ... IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional… more
    Qualcomm (06/06/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    …12. Experience in SoC integration and ASIC architecture 13. Experience with low power design and optimization, including UPF flow. 14. Experience with NoC, ... Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital microarchitecture and design for low -...to ASIC digital microarchitecture and design for low - power interconnect and power management… more
    Meta (05/01/25)
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  • DFT Engineer (Server)

    Qualcomm (San Diego, CA)
    …and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power , multi voltage designs. The successful candidate will help in ... create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will...advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power and multi voltage domain designs.… more
    Qualcomm (04/08/25)
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