- Qualcomm (San Diego, CA)
- …for the Snapdragon chips powering billions of mobile devices. The position requires Signoff Timing and spice simulation experience, with CAD development skills ... of STA features and Timing concepts. + 2-6 years of experience in Signoff Timing of SoCs at either top-level or block-level. * 2-6 years of experience with… more
- Qualcomm (San Diego, CA)
- …for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis . + Collaborate closely with RTL design ... Team is looking for skilled engineers to focus on timing constraints development, power analysis , STA, and timing closure for premium-tier chips.… more
- Google (San Diego, CA)
- …. + Be responsible for delivering System-on-Chip (SoC) Static Timing Analysis . + Define SoC timing signoff process corners, derates, uncertainties ... + Experience with ASIC design flows and methodology of static timing analysis . + Effective...full chip timing constraint creation and validation, timing signoff checklist criteria, perform full chip… more
- Qualcomm (San Diego, CA)
- …in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime toolset and should ... analysis ⦁ Develop strategies for 3DIC PDN analysis and signoff **Required Skills and Experience... **Required Skills and Experience :** ⦁ Expertise in static timing analysis . Hands-on… more
- Qualcomm (San Diego, CA)
- …> GPU ASICS Engineering **General Summary:** **Preferred Qualifications:** + Experience in static timing analysis , constraints and other physical ... using TCL and preferably Perl/Python as well. **Responsibilities** **:** + Timing analysis , validation and debug across multi-mode, multi-voltage domain… more