- Google (San Diego, CA)
- …technology process nodes. + Experience with ASIC design flows and methodology of static timing analysis . + Effective skills with scripting languages ... Google (https://careers.google.com/benefits/) . + Be responsible for delivering System-on-Chip (SoC) Static Timing Analysis . + Define SoC timing signoff… more
- Qualcomm (San Diego, CA)
- …Snapdragon chips powering billions of mobile devices. The position requires Signoff Timing and spice simulation experience, with CAD development skills to define and ... for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing teams. Qualcomm is using leading edge internal and EDA technologies in… more
- Qualcomm (San Diego, CA)
- …setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis . + Collaborate closely with RTL design ... Team is looking for skilled engineers to focus on timing constraints development, power analysis , STA, and timing closure for premium-tier chips.… more
- Qualcomm (San Diego, CA)
- …in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime toolset and should have ... power analysis and optimization, and IR drop analysis and optimization is also helpful. The engineer...signoff **Required Skills and Experience :** ⦁ Expertise in static timing analysis . Hands-on… more
- CDM Smith (San Diego, CA)
- …of Science in Civil Engineering with a Structural Focus. - Professional Structural Engineer license. - Experience with analysis and design of reinforced concrete ... codes and application to design situations. - Strong theoretical background in static and dynamic analysis of hydraulic structures and appurtenances with… more
- Qualcomm (San Diego, CA)
- …> GPU ASICS Engineering **General Summary:** **Preferred Qualifications:** + Experience in static timing analysis , constraints and other physical ... using TCL and preferably Perl/Python as well. **Responsibilities** **:** + Timing analysis , validation and debug across multi-mode, multi-voltage domain… more