- Google (San Diego, CA)
- …technology process nodes. + Experience with ASIC design flows and methodology of static timing analysis . + Experience in extraction of design ... Google (https://careers.google.com/benefits/) . + Be responsible for delivering System-on-Chip (SoC) Static Timing Analysis . + Define SoC timing signoff… more
- Qualcomm (San Diego, CA)
- …Snapdragon chips powering billions of mobile devices. The position requires Signoff Timing and spice simulation experience, with CAD development skills to define and ... for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing teams. Qualcomm is using leading edge internal and EDA technologies in… more
- Qualcomm (San Diego, CA)
- …setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis . + Collaborate closely with RTL design ... Team is looking for skilled engineers to focus on timing constraints development, power analysis , STA, and timing closure for premium-tier chips.… more
- Qualcomm (San Diego, CA)
- …also have experience with industry standard chip design tools and design flows for Static Timing Analysis , Spice / Fast spice simulation, Synthesis, DFT, ... automation skills. Hands-on experience in EDA tool automation, data analysis and visualization & large-scale software automation enablement. Excellent understanding… more
- Qualcomm (San Diego, CA)
- …in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime toolset and should have ... power analysis and optimization, and IR drop analysis and optimization is also helpful. The engineer...signoff **Required Skills and Experience :** ⦁ Expertise in static timing analysis . Hands-on… more
- Qualcomm (San Diego, CA)
- …product execution path. **Principal Duties & Responsibilities** + Perform digital synthesis and static timing analysis (STA) for complex digital designs. + ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...such as TCL, Perl, or Python. + Knowledge of static timing analysis and … more
- Meta (San Diego, CA)
- …plan development and verification. 3. Define timing constraints, run synthesis and static timing analysis . 4. Support the test program development, chip ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work...blocks into larger SOC environments. 7. Assist with performance/power analysis of the design and help meet the power… more
- CDM Smith (San Diego, CA)
- …of Science in Civil Engineering with a Structural Focus. - Professional Structural Engineer license. - Experience with analysis and design of reinforced concrete ... codes and application to design situations. - Strong theoretical background in static and dynamic analysis of hydraulic structures and appurtenances with… more
- Qualcomm (San Diego, CA)
- …Design Networks PDN-planning + Place & Route + Clock Tree Synthesis and customization + Static Timing Analysis + Understand Timing constraints + Fixing ... > ASICS Engineering **General Summary:** We are looking for a physical design engineer to join our design team in San Diego California. Successful candidate will… more
- Qualcomm (San Diego, CA)
- …place and route flows + Familiarity with Verilog and RTL design + Good understanding of static timing analysis and timing methodology + Proficient in ... > ASICS Engineering **General Summary:** Qualcomm's is seeking a digital design engineer for the Design Technology team. The candidate should have good knowledge… more
- Qualcomm (San Diego, CA)
- …- Synopsys Fusion Compiler, ICC2 and Cadence Genus/Innovus + Must have good knowledge of static timing analysis , reliability and power analysis + Strong ... teams to maximize PPA + Engaging in cross-functional collaboration with verification, timing , power, and packaging teams to ensure holistic design convergence +… more
- Qualcomm (San Diego, CA)
- …> GPU ASICS Engineering **General Summary:** **Preferred Qualifications:** + Experience in static timing analysis , constraints and other physical ... using TCL and preferably Perl/Python as well. **Responsibilities** **:** + Timing analysis , validation and debug across multi-mode, multi-voltage domain… more
- Qualcomm (San Diego, CA)
- …to work independently with little supervision. **Preferred Qualifications:** + Strong familiarity with Static Timing Analysis and Physical Design tools & ... ASICS Engineering **General Summary:** As a SoC Power/Performance Post-Si Validation & Emulation Engineer , you will be a vital member of our Global SoC System… more
- Qualcomm (San Diego, CA)
- …The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis , formal verification, PLDRC, clock domain ... domain crossing, etc + Work with physical design team on design constrain and timing closure + Work with low power team on power optimization Work with verification… more