- Qualcomm (San Diego, CA)
- …**Required Qualifications:** + Intelligent and high potential of learning new topics. + Familiarity with DDR interface, JEDEC spec, bus level view of ... create a smarter, connected future for all. Qualcomm's Silicon Validation team is part of the central SoC digital...languages and methodologies included in this team are: + DDR related debug + Regressionand PVT testing + Emulation… more
- Qualcomm (San Diego, CA)
- …Group, Engineering Group > ASICS Engineering **General Summary:** **Post-Silicon Validation & Emulation** **Responsibilities:** + Perform Silicon bring-up, measure ... RTL, and Design teams to resolve them. + Automate validation flows, data collection, and analysis using Python or...**Qualifications:** + Understanding of mobile chip architecture (CPU, GPU, DDR , NOCs, etc.), basic RTL, and exposure to transistor… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... Bachelor's degree in Science, Engineering, or related field. **Post-Silicon Validation & Emulation** **Responsibilities:** + Perform Silicon bring-up, measure… more
- Qualcomm (San Diego, CA)
- …and characterization. + Understanding firmware with the ability to write code (for DDR Training). + Familiarity with JEDEC specifications at electrical and ... Engineering, or related field and 4+ years of ASIC design, verification, validation , integration, or related work experience. OR Master's degree in Science,… more
- Amazon (San Diego, CA)
- …a new system with few legacy constraints. The Sr. FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to ... solutions - Design and debug high-speed interfaces including Ethernet, PCIe, and DDR - Debug hardware issues using logic analyzers and oscilloscopes - Create… more
- Qualcomm (San Diego, CA)
- …SERDES Interfaces such as PCIe, USB4, UFS, DP, MIPI(DSI,CSI), PLLs and leading edge LP- DDR & PC- DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY ... data analysis of parametric performance over various operating conditions and configurations. Engineer will also assist in HW design and debug power integrity (PI)… more
- Qualcomm (San Diego, CA)
- …+ Master's degree in Electrical or Computer Engineering Experience with/in: + Familiarity of overall SoC Infrastructure - DDR , Busses, CPUs, I/Os ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...power sequencing and multi-voltage domain design + Power analysis familiarity in areas of clocktree, peak power, TDP, limits… more