- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... and/or full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, … more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If ... timing such as timing constraints, timing analysis, timing convergence, and ECO implementation . What we need to see: + Hold a BS in Electrical or… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve ...implementation + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What… more
- NVIDIA (Santa Clara, CA)
- …for all aspects of timing including setting up timing constraints, timing analysis and closure, ECO implementation , and timing methodologies. + ... MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience...Timing + Hands-on experience in STA tools, ECO implementation , and timing closure of high-speed designs.… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...optimization techniques and generate optimized Gate Level Netlist for Timing , Area, Power 2. Debug the timing /area/congestion… more
- Meta (Sunnyvale, CA)
- … Implementation Engineers within our Infrastructure organization. **Required Skills:** ASIC Implementation Engineer - Static Verification ... TCL, and Make 16. Experience with SOC Design Integration and Front-End Implementation 17. Knowledge of Timing /physical libraries, SRAM Memories 18. Experience… more
- Broadcom (San Jose, CA)
- …major segments of the Semiconductor industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ... concept through product release. Become a member of an ASIC design team responsible for all aspects of physical...- Floor planning chips and blocks - Routing - Timing , both mission mode and test modes - Integration… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's...be responsible for the RTL design, logic synthesis, and timing analysis of several modules. + Integrate modules into… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple ... place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. +...+ Requires a minimum of 8 years of related ASIC implementation experience. + BS degree in… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical... design teams by influencing early design and physical implementation decisions. + You will build tools and improve… more
- Google (Sunnyvale, CA)
- …related field. + 5 years of experience in Application-specific integrated circuit ( ASIC ) design. + Experience working on interconnects and network subsystems. Be ... hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design Engineer , you will play an important role in designing ASIC… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... and GPUs. + Explore design space, create optimum floorplan, drive synthesis, physical implementation , and timing closure by understanding arch/logic as well as… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... and implementation specifications. + Implement Verilog RTL to meet timing and performance requirements. + Help define, evolve, and support our design… more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis, static timing analysis. You will either be responsible for block and/or chip level design and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... you will be responsible for the micro-architecture and digital design implementation of various innovative IPs for hardware security, clocking, voltage regulation… more
- Meta (Sunnyvale, CA)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug 4. Collaboration with implementation team to close the design on timing… more
- Amazon (Sunnyvale, CA)
- …communities around the world. Come work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using ... system specification to chip specification to RTL to optimizing timing / power to chip level validation. . Develop... and power targets by working closely with the implementation team. . Learn about requirements and solutions for… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... of the DFX methodology team, you will be responsible for the architecture, design, implementation and verification of fuse controller and other DFT IPs for our next… more