- NVIDIA (Santa Clara, CA)
- …a member of this team, you will be responsible for championing and architecting silicon cross-IP power savings features with a deep understanding of product ... in some of the following areas: + Architect, develop and debug silicon and system power savings features + Analyzing Data Center, Client, or Automotive use cases… more
- Microsoft Corporation (Santa Clara, CA)
- …cutting-edge, high performance, low power , scalable and programmable DPU silicon . **Responsibilities** + As a Senior Silicon Engineer in the ... Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Silicon Engineer. You... latency, high bandwidth) design techniques + Understanding of low power microarchitecture techniques. Knowledge of Verilog,… more
- Microsoft Corporation (Santa Clara, CA)
- …delivering cutting-edge, high performance, low power , scalable and programmable DPU silicon . As a Senior Silicon Engineer PCIe in the Data Processing ... Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer - PCIe. You will...every two years thereafter. **Preferred Qualifications:** + High performance ( low latency, high bandwidth) design techniques + Knowledge of… more
- Microsoft Corporation (Mountain View, CA)
- …within the Microsoft silicon engineering organization. We are looking for a ** Senior Silicon Engineer** to join our team! **Microsoft's mission is to empower ... equivalence failures. + Perform cross-functional decision making across UPF (Unified Power Format)/ Low Power methodology/architecture, DFT methodology,… more
- Microsoft Corporation (Santa Clara, CA)
- …Microsoft Silicon Engineering and Solutions Team is looking to hire a ** Senior Silicon Engineer** to join our Central Front-End Tools, Flows and Methodology ... + Design release packaging and qualification, RTL quality flows, static checks. + Low Power design. **Other Requirements** Ability to meet Microsoft, customer… more
- SpaceX (Sunnyvale, CA)
- …with advanced silicon process and technology nodes for high speed and low power consumption + Software design and development skills + Excellent scripting ... Sr. FPGA/ASIC Design Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was...to solve complex problems including clock domain crossings and power optimization + ASIC/SoC system integration experience + Experience… more
- SpaceX (Sunnyvale, CA)
- … power intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified ... Sr. Synthesis & Front-End STA Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was...flow, top-down and bottom-up design methodologies + Knowledge of low - power methodologies and leakage/dynamic power … more
- Qualcomm (Santa Clara, CA)
- …is also responsible for the silicon power measurements, Si debug and power correlation. + Experience in SoC low power micro-architecture, low ... will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation,... Power Intent/Implementation, power optimization and power estimation + Experience in silicon bring… more
- NVIDIA (Santa Clara, CA)
- …is fueled by its great technology and amazing people. We are seeking a Senior Power and Performance Architect to influence, innovate and drive next generation ... product systems; for products ranging from largescale datacenters to low - power client devices. + Lead the team...+ Expertise and deep understanding in the areas of silicon power , transistor/device physics, power … more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Power Optimization and Analysis Engineer! NVIDIA prides ourselves in having energy efficient products. We believe that continuing ... efficiency. + Develop and share best practices for performing pre- silicon power analysis. + Perform comparative ...of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog… more
- NVIDIA (Santa Clara, CA)
- …+ Good understanding of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog and ASIC design principles, ... We are looking for a Senior Emulation Power Engineer! NVIDIA prides...captures. + Use internally developed tools and industry standard pre- silicon Gate-level and RTL power analysis tools,… more
- NVIDIA (Santa Clara, CA)
- …of energy efficient chip/system design fundamentals and related tradeoffs. + Familiarity with low power design techniques such as multi-VT, Clock gating, ... We are looking for a Senior Datacenter GPU Power Architect. NVIDIA...to drive new HW/SW features for Perf@Watt improvements. + Pre- silicon thermal analysis for next-gen GPUs including design of… more
- NVIDIA (Santa Clara, CA)
- …and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical ... + Basic understanding of fundamental concepts of energy consumption, estimation, and low power design. + Desire to bring quantitative decision-making and… more
- NVIDIA (Santa Clara, CA)
- We are now hiring a Senior System Software Engineer to join the NVIDIA's System Software group focusing on Data Center Server Platform Diagnostics. You will join a ... that builds and maintains software for complex heterogeneous computing systems that power sophisticated server products used in ground breaking of diverse AI, HPC,… more
- Qualcomm (San Jose, CA)
- …implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power , multi voltage designs. The candidate should have solid ... simulations. The ideal candidate will have experience in both pre, and post- silicon in the DFT domain **Minimum Qualifications:** * Bachelor's degree in Science,… more
- Google (Sunnyvale, CA)
- …Transfer Level code in Verilog. + Experience with non-x86 microarchitectures, including low level performance analysis. + Experience in Python and good understanding ... of Object Oriented Programming and Functional Programming. + Experience with silicon architecture and design with the ability to root cause performance bottlenecks… more
- Qualcomm (Santa Clara, CA)
- …circuits, and/or physical design to develop and verify critical high performance and low power CPU designs. * Anticipates, identifies, and solves highly complex ... 10+ years of work experience with simulation, emulation, formal verification, or silicon validation. * 10+ years of experience in creating functional models,… more
- Amazon (Sunnyvale, CA)
- Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing...digital design implementation flows to design teams using various silicon processes - Develop, regress, and deploy digital front… more
- Qualcomm (Santa Clara, CA)
- …electronics and access point segment. Next generation Wi-Fi solutions will drive lower power , ultra- low latency and higher throughputs to enable best in class ... into potential changes for the differentiated product roadmap and communicates this to senior leaders. - Holds self and team(s) accountable for remaining up to date… more
- Qualcomm (Santa Clara, CA)
- …access point segments. Next generation Wi-Fi, BT and UWB solutions will drive lower power , ultra- low latency and higher throughputs to enable best in class user ... roadmap + Communicates the product definition and roadmap to senior leaders + Identifies gaps and trends in market...in multiple geographies + Experience in managing the overall silicon manufacturing process + Team Leadership: The ideal candidate… more