• Hardware Engineer Intern - ASIC

    IBM (San Jose, CA)
    …+ Experience in ASIC or FPGA logic verification . + Strong FPGA / ASIC RTL logic design skills. + Experience with programming in C, C++ and ... write VHDL/Verilog modules for the AI Accelerator SoC and perform functional verification of design modules. You will be developing tests for functional logic … more
    IBM (09/18/24)
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  • SoC Design Architect

    Cadence Design Systems, Inc. (San Jose, CA)
    …team's workflows. Skills + Must have at least 4 years of experience in managing ASIC design , integration, or verification teams. + Must have expertise in ... verification . + Experience in using UVM for functional verification of ASIC designs. + Experience with...Cadence and Synopsys for design simulation and verification . + Extensive experience with FPGA emulation,… more
    Cadence Design Systems, Inc. (07/06/24)
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  • FPGA Engineer

    Amazon (Sunnyvale, CA)
    …- Experience with Intel & Xilinx FPGAs - Experience with modern ASIC / FPGA design and verification tools - Experience with uArchitecture, RTL coding, ... a groundbreaking new system with few legacy constraints. The FPGA design engineer will work with systems...- Proven track record of successfully fielding and supporting FPGA and ASIC products - Good analytical,… more
    Amazon (08/16/24)
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  • Senior Principal Front End ASIC

    BAE Systems (San Jose, CA)
    …Engineering, Computer Engineering, or Computer Science + Proficient in Verilog language for Front End ASIC design , and related FPGA + Knowledge of ASIC ... chip designer who has strong proficiency in both + ASIC design - performing architecture design ,...verification methodologies (VCS simulator, UVM) + Proficient in ASIC / FPGA timing closure/area optimization techniques + Hands… more
    BAE Systems (09/18/24)
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  • Sr Architect - ASIC

    GE HealthCare (Palo Alto, CA)
    design teams, and Hardware Subsystem teams to help deliver mixed-signal and digital ASIC design solutions. The candidate will engage with module owners and ... associated demodulation, digital filtering, etc functional blocks) and digital ASIC design * Familiarity with System Verilog...to understand FPGA -based designs; familiar with transitioning FPGA solutions to ASIC * Scope and… more
    GE HealthCare (07/21/24)
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  • Technical Program Manager, ASIC

    Meta (Menlo Park, CA)
    **Summary:** Meta is seeking a Technical Program Manager with ASIC / FPGA design and development experience. This Technical Program Manager (TPM) will lead ... details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification , physical… more
    Meta (07/19/24)
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  • SoC Modeling ASIC Engineer

    Meta (Sunnyvale, CA)
    …pre-silicon models 5. Collaborate with cross functional teams working on RTL design , Design Verification , Firmware/Software development, to deliver first ... silicon 9. In-depth understanding of system-on-chip (SoC) architecture, SoC memory hierarchy, and ASIC design flow 10. Proficient programming skills in C++ and… more
    Meta (08/07/24)
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  • RTL Design Engineer, Silicon

    Google (Mountain View, CA)
    …high performance and energy efficient design techniques. + Experience with ASIC Verification or DFT. + Knowledge in Processor Cores, Buses/Fabric/NoC, ... Engineering, Computer Engineering or Computer Science. + Experience with ASIC design methodologies for clock domain checks,...for clock domain checks, reset checks and low power design . + Experience with FPGA and emulation… more
    Google (09/11/24)
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  • Sr. Design Verification Engineer…

    SpaceX (Sunnyvale, CA)
    …the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and system level ... Sr. Design Verification Engineer (Silicon Engineering) at...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
    SpaceX (09/05/24)
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  • Design Verification Engineer

    Verilab (San Jose, CA)
    … experts. Founded in 2000, we specialize in solving the toughest functional verification problems for ASIC , FPGA and independent IP development. ... of consultants, providing clients with the very best in verification . You will be exposed to a diverse range...Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly… more
    Verilab (07/19/24)
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  • Functional Verification Applications…

    Siemens Digital Industries Software (Fremont, CA)
    …for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL ... uncovering, scoping, and technical validity of the solutions to achieve the customer's design and verification objectives + Keeps other technical peers (country… more
    Siemens Digital Industries Software (09/07/24)
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  • Sr. DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC / FPGA Design Engineer/Senior: $170,000.00 - $230,000.00/per year Your ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this… more
    SpaceX (07/22/24)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define… more
    Meta (07/26/24)
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  • Senior Applications Engineer - DDR Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops industry… more
    Cadence Design Systems, Inc. (09/17/24)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …thesis in a relevant area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on ... of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement...flow for the platform with other engineers. + Write Design Specifications and Unit Tests for your code Position… more
    Cadence Design Systems, Inc. (07/03/24)
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  • M/Dmts -- FW Architect

    Micron Technology, Inc. (San Jose, CA)
    …Engage in modeling, firmware coding, simulation results analysis, failure analysis, ASIC / FPGA -based bring-up/debug, and documentation. + Conduct analysis of ... within controlled latency environments. + Proven understanding of firmware development, verification , system failure analysis, embedded systems design , and… more
    Micron Technology, Inc. (08/23/24)
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  • Software Engineer - Principal

    Siemens Digital Industries Software (Fremont, CA)
    …(RTL) code targeted for FPGAs (https://en.wikipedia.org/wiki/ FPGA ) and ASICs (https://en.wikipedia.org/wiki/Application-specific\_integrated\_circuit) . ... lead and improve upon current High-level synthesis and High-level verification solutions like PPA exploration and estimation, or orchestration...skills. **Technical Skills (Desirable) :** + Understanding of digital design for ASIC or FPGA .… more
    Siemens Digital Industries Software (09/07/24)
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