- Meta (Sunnyvale, CA)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...Qualifications:** Minimum Qualifications: 8. 5+ years of experience in static verification tools 9. Experience with Lint, Clock Domain… more
- The Boeing Company (Mountain View, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... of ASIC /FPGA design or verification experience) + Experience with ASIC /FPGA architectural definition, and detailed design implementation and functional… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis ... Physical Design Execution for Clock Tree Synthesis and Routing optimization 20. 4 Static timing analysis and verification at different PVT corner 21. 5. Timing ECO… more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis, static timing analysis. You will either be responsible for block and/or chip level design and… more
- Google (Sunnyvale, CA)
- …AI/ML-driven systems. As an Application-Specific Integrated Circuit ( ASIC ) Physical Design Engineer on the Chip Implementation team, you will work on the ... . + Work on physical design including place and route, EMIR, static timing, and physical verification. + Go beyond automated flow execution and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve timing convergence flows working… more
- NVIDIA (Santa Clara, CA)
- …generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You will be ... timing including setting up timing constraints, timing analysis and closure, ECO implementation , and timing methodologies. + Finding the right tradeoffs and balance… more
- Qualcomm (Santa Clara, CA)
- …transformation to help create a smarter, connected future for all. Qualcomm's SoC Implementation Team is looking for skilled engineers to focus on timing constraints ... for premium-tier chips. This is an excellent opportunity to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm nodes across mobile,… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is looking for a senior level STA engineer . In this highly visible role you will be working on various ASIC ... or Computer Engineering with 8+ years of experience in ASIC Design Verification or MS in Electrical Engineering or...hierarchical designs. + Knowledge of clock tree planning and implementation for SoCs. + Experience with timing ECO creation… more
- Broadcom (San Jose, CA)
- …working on initial floor plan. 4). Develop Verilog RTL. logic synthesis, physical implementation constraints, static timing analysis. 5). Work directly with the ... brought some of the most complex and cutting-edge networking ASIC 's and multichip solutions to market over the last...physical implementation team from initial floor planning to final timing… more
- Meta (Sunnyvale, CA)
- … Engineer Responsibilities: 1. Develop and own physical design implementation of multi-hierarchy low-power ML Hardware design including physical-aware logic ... and back-end hardware designers to drive the Physical design implementation of ML compute blocks in advanced technology nodes...synthesis, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification… more
- Meta (Sunnyvale, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
- Microsoft Corporation (Santa Clara, CA)
- …the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer . You will join our front-end silicon team and be responsible for delivering ... scalable and programmable DPU silicon. As a Senior Silicon Engineer in the Data Processing Unit team you will...with the architecture team to develop a programmable silicon implementation . This position is expected to be highly visible… more