- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing,… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, ... and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic...with Static Timing Analysis (STA) + Experience physical design and optimization eg, synthesis, floorplanning,… more
- NVIDIA (Santa Clara, CA)
- …summer . Potential Internships in this field include: + AI Developer Technology + ASIC Physical Design and Timing + GPU Verification and Design + ... CAD Skills: Catia, SiemensNX , Solidworks Creo + Understanding of VLSI design , computer architecture, computer arithmetic CMOS transistors, and circuits + Basic… more
- NVIDIA (Santa Clara, CA)
- …Electrical or Computer Engineering or equivalent experience. + 8+ years experience in Physical design / Timing . + Experience in full-chip/sub-chip Static ... generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic...of multiplexed scan logic and constraints. + Expertise in physical design , optimization, and ECO implementation eg… more
- NVIDIA (Santa Clara, CA)
- …with 5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO ... and ability to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd:… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- The Boeing Company (Mountain View, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers**...team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary checks… more
- NVIDIA (Santa Clara, CA)
- …and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design ... What you will be doing: + Working with architects, design leads, physical design leads...Drive the area review process and collaborate with the ASIC design team to identify area, interconnect… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and ... logic synthesis, netlist quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing constraints generation… more
- NVIDIA (Santa Clara, CA)
- …architecture modeling team to determine proper expected design behavior. + Work with physical design engineers to drive timing , area, and power closure. ... We are now looking for a Senior Video ASIC Design Engineer! NVIDIA has been..., and area optimization, static checks, and support of physical design engineers through place and route.… more
- Google (Sunnyvale, CA)
- …+ Knowledge of ASIC Verification, Design For Testing (DFT), Synthesis, Static Timing Analysis (STA), or Physical Design . **About the job** In this ... Technical Lead Manager, ASIC Design , Machine Learning _corporate_fare_ Google...power and area design goals, and explore RTL/ design trade-offs for physical design … more
- NVIDIA (Santa Clara, CA)
- …. + A deep understanding of ASIC design flow including RTL design , verification, logic synthesis, timing analysis, ECO, and post silicon debug. + Strong ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design...verification engineers. + Deliver a synthesis/ timing clean design while working with the physical … more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... ASIC Engineering Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1451402) + Location:San...and methodologies, and collaborate closely with RTL designers and physical design teams. Responsibilities include: + Participate… more
- NVIDIA (Santa Clara, CA)
- … closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing… more
- NVIDIA (Santa Clara, CA)
- …modules. What you'll be doing: + Be an integral part of the System ASIC Design team to help with the Micro-architecture definition for system-level functions, ... controllers. + You will be responsible for the RTL design , logic synthesis, and timing analysis of...functions like Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design… more
- NVIDIA (Santa Clara, CA)
- …with all stages of ASIC design flow including front end design and verification, DFT, and timing analysis + Strong team player with outstanding ... We are now looking for a motivated Senior ASIC Design Engineer to join our..., Verilog and/or System-Verilog with a deep understanding of physical design and VLSI + Experience with… more
- SpaceX (Sunnyvale, CA)
- …in scan insertion or DFT setup PREFERRED SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design , and verification ... + Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools + Integration and… more
- NVIDIA (Santa Clara, CA)
- By submitting your resume, you're expressing interest in one of our 202 6 Hardware ASIC Design Internships. We'll review resumes on an ongoing basis, and a ... Power and Noise Analysis, Silicon Instrumentation and Measurement + CAD and Physical Design Methodologies (Flow and Tool s Development), Chop Floorplan,… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis,...design : full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and… more
- SpaceX (Sunnyvale, CA)
- …extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/Senior: $170,000.00 - $230,000.00/per year Your actual level ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering and ASIC implementation). In… more