- Google (Mountain View, CA)
- … memory subsystem design . + 10 years of experience in high-performance CPU , cache subsystem or AI accelerator logic/RTL design including ... . + Lead and manage a team of design engineers working on CPU , cache subsystem , or AI accelerator design and integration into SoC, emphasizing… more
- Google (Mountain View, CA)
- …+ 10 years of experience in high-performance CPU , cache subsystem or AI accelerator logic/RTL design including microarchitecture definition and PPA ... . + Lead and manage a team of design engineers working on CPU , cache subsystem , or Artificial Intelligence (AI) accelerator design and integration… more
- Qualcomm (Santa Clara, CA)
- …CPU and SOC level micro-architectures. You will work on a selected part of the CPU Design Verification to ensure that it functions to the standards of being ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer,… more
- Google (Mountain View, CA)
- …(PPA) under peak current and thermal constraints with a focus on the CPU subsystem . + Define power key performance indicators and SoC/IP-level power ... and power analysis. + 8 years of experience in SoC power management or low power design /methodology. + Experience in CPU power in mobile SoCs from CPU … more