- NVIDIA (Santa Clara, CA)
- …experience) in Computer Science or Electrical or Computer Engineering and 5 years of CAD /software development experience; MS preferred with 3 years of CAD ... you'll design, develop and support sophisticated software around EDA tools and other CAD programs. What you'll be doing: + You will architect highly automated and… more
- Amazon (Sunnyvale, CA)
- …closely supporting and troubleshooting CAD flow usage - Develop standardized CAD flows that can be leveraged across development based on various process ... broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible...Electrical/Computer Engineering - 7+ years of silicon digital EDA flow development and/or digital design experience -… more
- Qualcomm (Santa Clara, CA)
- …years of experience in field of Hardware Emulation. + 5+ years of experience in CAD tool/ flow development . + 4+ years of experience with Programming Language ... Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the DV & Emulation methodology...of work experience in a role requiring interaction with senior leadership (eg, Director level and above). + 1+… more
- NVIDIA (Santa Clara, CA)
- …team, you'll design, develop and support sophisticated flows around EDA tools and our CAD programs. What you'll be doing: + You will architect highly automated and ... Be responsible for design, implementation and testing in-house of CAD programs + Work with design teams and leading...Computer Engineering or equivalent experience with 3+ years of CAD experience; MS preferred + Be familiar with Verilog… more
- Silicon Valley Power (Santa Clara, CA)
- ** Senior Civil Engineer** Print (https://www.governmentjobs.com/careers/cityofsantaclaraca/jobs/newprint/4420027) ** Senior Civil Engineer** Salary $154,897.80 ... highest quality public works services to the residents of Santa Clara, the development community, and our customers in a responsible and efficient manner. The… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer, you'll join a group of hard-working engineers to ... level RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using the latest process technologies. + You will be… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer, you'll join a group of hard-working engineers to ... including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using the latest process technologies. What We Need… more
- NVIDIA (Santa Clara, CA)
- …similar HVL + Experience with CAD and physical design methodologies ( flow and tool development ), chip floorplan, power/clock distribution, packaging, P&R and ... We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking...opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing… more
- NVIDIA (Santa Clara, CA)
- …push boundaries for all our CPU products! What you'll be doing: + Work on CAD tools development for the CPU/Fabric teams to improve efficiency + Develop ... Do you want to help drive the development of CPU technology for architectures used for...to enable productivity improvements + Understand the chip design flow and distill this knowledge into feature requirements for… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- …user community, covering a very broad research portfolio that includes the development of advanced materials and chemical catalysts for clean energy systems; drug ... science. **Your specific responsibilities include:** + Contribute to the development , definition, and generation of detailed requirement documents, machine parameter… more
- SpaceX (Sunnyvale, CA)
- …Science + 8+ years of experience working with ASICs and the VLSI design flow + Experience in RTL development and verification using Verilog and/or SystemVerilog ... and addressing issues + Responsible for Memory Controller/PHY IP core development and integration + Responsible for RTL design, synthesis, timing constraints,… more