- NVIDIA (Santa Clara, CA)
- …innovative CAD Software Developer with particular interest in algorithms for gate-level timing and physical optimization, including sizing and buffering, clock ... + Strength in both CAD software and VLSI design + Strong understanding of VLSI timing ...VLSI design + Strong understanding of VLSI timing optimization and related concepts, including cell libraries, interconnect… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...most sophisticated strategies of signing off timing in design for world-class silicon performance.… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- Lasers and Timing Systems Engineering Department Head Job ID 6025 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position Overview** The ... Accelerator Laboratory seeks a mechanical engineer to lead the Lasers and Timing Systems Engineering Department. LCLS is an X-ray Free Electron (FEL) facility… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive physical design and timing from netlist to gds. + Partner with ... design . + Experienced in Synopsys or Cadence place and route, physical design and timing tools. + Ability to form methodologies and automate flows.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... you'll be doing: + Responsible for all aspects of physical design and implementation of GPU and...+ Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop… more
- NVIDIA (Santa Clara, CA)
- …interconnect network and last-level caches , working closely with the physical design team on implementation, synthesis and timing closure as well as working ... a liaison between Logic design and Physical design teams responsible for achieving timing , area, performance and power goals of the unit. + Help define… more
- NVIDIA (Santa Clara, CA)
- …and Verification. + Strong background with hierarchical design approach, top-down design , budgeting, timing and physical convergence. + Familiar with ... strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics...floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and… more
- NVIDIA (Santa Clara, CA)
- …meet performance, timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design team ensuring a routable ... We are looking for a Senior CPU Design Engineer! NVIDIA is...with architects, design engineers, verification engineers, and physical design engineers teams to accomplish your… more
- NVIDIA (Santa Clara, CA)
- … by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure a ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to ...+ Collaborate with architects, verification engineers, software engineers, and physical design engineers to accomplish your goals.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... improving the netlist and timing quality of our designs and if you are...analysis on the design . + Drive the design and physical implementation of digital and/or… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …static timing analysis and constraint development + Understanding of fundamental physical design flows and stages + Understanding impacts of analog and ... to join a dynamic and growing team of engineers developing high-speed physical IP for industry-standard protocols. The successful candidate will be a highly… more
- SpaceX (Sunnyvale, CA)
- …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at...(eg synthesis, floorplanning, power/ground grid generation, place and route, timing , noise, physical verification, electromigration, voltage drop,… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/Core block physical… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer in our Circuits Solutions Group! NVIDIA has been redefining computer graphics, PC gaming, and ... power management solutions. + Responsible for all aspects of physical design and implementation of GPU and...automation, floorplan, power/clock distribution, IP and toplevel P&R, and timing closure. + Drive the physical implementation… more
- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Design Engineer** to work in the dynamic Microsoft Artificial Intelligence ... program you will be interacting with various teams, including architecture, verification, and physical design , ensuring that the design is implemented and… more
- NVIDIA (Santa Clara, CA)
- …all aspects of GPU and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...with other architects, ASIC designers and verification engineers to design high frequency clocks. + You should be able… more
- NVIDIA (Santa Clara, CA)
- …circuits for hardware security, adaptive clocking and power management solutions + Drive the design and physical implementation of custom digital IPs from RTL to ... impact on the world! What you'll be doing: + Participate in ground breaking Processor design in deep submicron technologies. + Work as part of a global circuits team… more
- NVIDIA (Santa Clara, CA)
- …crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, interacts with the ... floor-planning and back end teams to help craft the physical floorplan of the chip and explains the programming...with other architects, ASIC designers and verification engineers to design high frequency clocks. + You should be able… more
- SpaceX (Sunnyvale, CA)
- …for Memory Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation, and timing ... to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual level… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to join our...You will be responsible for all aspects of front-end design implementation methodologies (synthesis, formal-equivalence-checking), flow automation and application… more