• ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
    Meta (10/30/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
    Meta (10/30/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …first-pass silicon success. 5. Furthermore, the ASIC Engineer , Design Verification will define and implement IP /SoC verification plans, build ... to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...with components for stimulus, checkers, and reference models 18. Block/ IP /SoC/full chip level verification 19. Formal property more
    Meta (11/01/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...2. Micro-architecture development 3. Soft and hard IP identification, selection and integration. Collaboration with verification and… more
    Meta (10/30/25)
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  • ASIC Engineer , Physical…

    Meta (Sunnyvale, CA)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... 3. Deliver physical design of an end-to-end IP or integration of ASIC /SoC design...to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
    Meta (11/05/25)
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  • ASIC Engineer , IP

    Google (Mountain View, CA)
    ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... with an emphasis on computer architecture. + 6 years of industry experience with IP design . + Experience with methodologies for low power estimation, timing… more
    Google (11/04/25)
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  • Senior Video ASIC Design

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Video ASIC Design Engineer ! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more ... to drive design methodology to continuously improve design quality and engineer efficiency, including leveraging...AI tools and techniques. + Collaborate with verification engineers, IP architects, and other ASIC design more
    NVIDIA (10/15/25)
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  • Specialist, Electrical Engineer

    L3Harris (Herndon, VA)
    …land, sea and cyber domains in the interest of national security. Job Title: Specialist ASIC /FPGA Design Engineer Job Code: 30424 Job Location: Herndon, VA ... with customers in more than 100 countries. Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Design Engineer will be part of the key … more
    L3Harris (10/26/25)
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  • ASIC /FPGA Design Engineer

    L3Harris (Camden, NJ)
    …air, land, sea and cyber domains in the interest of national security. Job Title: ASIC /FPGA Design Engineer (SMES) Job Code: 29446 Job Location: Camden, NJ ... Engineering Staff (SMES) will be part of the key ASIC /FPGA design team, responsible for the delivery...architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design /debug with Ethernet, TCP/ IP protocols. L3Harris has… more
    L3Harris (10/12/25)
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  • ASIC & FPGA Design Engineer

    Lockheed Martin (Orlando, FL)
    **Description:** You will be the ASIC & FPGA Design Engineer at Lockheed Martin, responsible for designing, simulating, and integrating Field\-Programmable ... cutting\-edge technologies\. **What You Will Be Doing** As the ASIC & FPGA Design Engineer ,...Xilinx/AMD and MicroSemi/Microchip part families internal FPGA fabric and IP \. \- FPGA design experience with tools… more
    Lockheed Martin (11/13/25)
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  • Sr. ASIC Design Engineer

    Amazon (Austin, TX)
    design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...innovate, explore new solutions, and contribute to the company's intellectual property through patents About the team… more
    Amazon (09/13/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... management solutions. + Define micro-architecture and specifications of digital IP blocks to improve the power and performance of...+ Strong familiarity and experience with all stages of ASIC design flow including front end … more
    NVIDIA (08/27/25)
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  • ASIC Design Engineer

    NVIDIA (Austin, TX)
    …can make a lasting impact on the world. Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on ... improving methodologies and delivering system-level IP to measure performance across multiple projects. What you'll...system + Run and debug RTL checks to ensure design quality (eg, cross clock domains (CDC), clocks, reset,… more
    NVIDIA (09/17/25)
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  • Principal Design Engineer

    Micron Technology, Inc. (Richardson, TX)
    …communicate and advance faster than ever. Micron is seeking a highly motivated and experienced ASIC Design Engineer to define and drive the architecture of ... efficiency, and reliability. **Key Responsibilities:** + Define and develop chiplet-based ASIC SOC architectures for memory and storage controllers, utilizing DRAM,… more
    Micron Technology, Inc. (10/25/25)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER ...world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design more
    SpaceX (11/18/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... and DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all… more
    NVIDIA (10/28/25)
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  • ASIC Modem Design Engineer

    Amazon (San Diego, CA)
    …communities around the world. Come work at Amazon! We're hiring a Modem Design Engineer within a high performance ASIC design team. This team is using ... industry leading methodologies to develop proprietary IP 's. The Role: Be part of Project Kuiper's sub-team...and system engineers to drive hardware micro-architecture and datapath design . - Able to interpret reference models in MATLAB.… more
    Amazon (09/13/25)
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  • Lead ASIC Design Engineer

    Amazon (Austin, TX)
    …. Define and develop any necessary support logic . Configure, instantiate and integrate 3rd party IP blocks . Understand low power design & the impact of DFT on ... refugee or granted asylum. Key job responsibilities Key job responsibilities RTL Design and development of custom blocks. Integration of large subsystems Gate Level… more
    Amazon (09/26/25)
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  • ASIC Design Engineer , Amazon…

    Amazon (Austin, TX)
    …. Define and develop any necessary support logic . Configure, instantiate and integrate 3rd party IP blocks . Understand low power design & the impact of DFT on ... Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic… more
    Amazon (09/10/25)
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  • Sr. ASIC Design Engineer

    Amazon (Sunnyvale, CA)
    …specifications suitable for being implemented by junior engineers -Evaluate 3rd party IP blocks -Estimate power, performance, and area for significant IPs early in ... design cycle -Execute on design specifications to deliver high quality RTL -Ensure quality by running and tracking results of front-end tools including:… more
    Amazon (10/18/25)
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