- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing,… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, ... and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic...with Static Timing Analysis (STA) + Experience physical design and optimization eg, synthesis, floorplanning,… more
- Cisco (San Jose, CA)
- …teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this ... startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part...oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing… more
- Northrop Grumman (Linthicum Heights, MD)
- …+ Work closely with design , verification, design -for-test and physical design teams to optimize the timing and improve design performance + ... maintain timing methodologies and flows for efficient timing analysis and closure + Conduct design ...of experience in the full product life cycle of ASIC Design **Preferred Qualifications:** + Master's Degree… more
- NVIDIA (Westford, MA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking ... in a technology-focused company. What you will be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Northrop Grumman (Annapolis Junction, MD)
- …Proficient in backend ASIC design including synthesis and static timing analysis, place and route, physical verification (LVS/DRC) + Proficient with ... our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Staff ASIC Physical Design Engineer to support our growing engineering team in advanced… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities:...cross-functional teams, IP, and EDA vendors 11. Experience in physical design and timing closure… more
- The Boeing Company (Huntington Beach, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers...team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary checks… more
- ManpowerGroup (Phoenix, AZ)
- **Job Title: Physical Verification Engineer ( ASIC Design )** **Location: USA & Canada (Remote is OK, Phoenix or Ottawa preferred)** **Role Overview** As a ** ... Engineer** , you will be responsible for ensuring that ASIC layouts meet all foundry design rules...and compliance with foundry specifications. Working closely with layout, physical design , and CAD teams, you'll help… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER (SILICON ENGINEERING) At SpaceX… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality… more
- NVIDIA (Santa Clara, CA)
- …and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design ... What you will be doing: + Working with architects, design leads, physical design leads...Drive the area review process and collaborate with the ASIC design team to identify area, interconnect… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and ... logic synthesis, netlist quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing constraints generation… more
- NVIDIA (Santa Clara, CA)
- …architecture modeling team to determine proper expected design behavior. + Work with physical design engineers to drive timing , area, and power closure. ... We are now looking for a Senior Video ASIC Design Engineer! NVIDIA has been..., and area optimization, static checks, and support of physical design engineers through place and route.… more
- Teradyne (North Reading, MA)
- …interface protocols + Use of digital simulation tools to verify designs. + Creation of physical design constraints for placement, timing closure and CDC + ... Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ ASIC Design Engineer to work with a...such as Python, TCL and Perl + Experience with physical design tools from FPGA vendors (Vivado… more
- NVIDIA (Santa Clara, CA)
- …is a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup ... NVIDIA is looking for an ASIC Design Engineer to join our...Subsystem Design team, you will collaborate with architects/ design verification/formal verification/ physical design team… more
- NVIDIA (Santa Clara, CA)
- … closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing… more
- NVIDIA (Santa Clara, CA)
- …modules. What you'll be doing: + Be an integral part of the System ASIC Design team to help with the Micro-architecture definition for system-level functions, ... controllers. + You will be responsible for the RTL design , logic synthesis, and timing analysis of...functions like Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design… more