• Fidelity TalentSource LLC (Westlake, TX)
    …and Spring Framework. Builds Cloud enabled applications using 12 factor design . Performs Docker containerization and Amazon Web Services (AWS) Cloud ... development experts and management. Primary Responsibilities: Participates in architecture design teams.Defines and implements application level architecture.Develops applications on… more
    JobGet (05/28/24)
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  • CPU Design Methodology

    NVIDIA (Hillsboro, OR)
    We are now looking for a CPU Design Methodology Engineer : The complexity of chip development has greatly increased over the years. We are now packing ... The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be… more
    NVIDIA (03/05/24)
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  • CPU Physical Design

    Qualcomm (Austin, TX)
    …Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with implementation and CAD teams ... (RTL, Physical design , Circuits, CAD) to solve key physical design problems in CPU implementations. + Develop innovative techniques in Physical design more
    Qualcomm (03/08/24)
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  • Staff CPU Design Verification…

    Google (Mountain View, CA)
    …facility, including construction and equipment installation/troubleshooting/debugging with vendors. As a CPU Design Verification Engineer , you will own ... that power all of Google's services. As a Hardware Engineer , you design and build the systems...functional verification for part of a CPU design . You will develop functional verification… more
    Google (05/22/24)
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  • CPU Emulation Engineer

    Qualcomm (Santa Clara, CA)
    …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Emulation Engineer , you will work as part of CPU ... CPU emulation across different platforms. + Develop verification methodology , ensuring scalable and portable environment across simulation and emulation. +… more
    Qualcomm (05/03/24)
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  • CPU Physical Design CAD…

    Qualcomm (Santa Clara, CA)
    …to create designs that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support ... issues + Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. +… more
    Qualcomm (04/24/24)
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  • CPU Verification Engineer (Multiple…

    Qualcomm (Austin, TX)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate ... You will work on a selected part of the CPU Design Verification to ensure that it...based on the Architecture and Micro-architecture. + Develop Verification Methodology , ensuring scalability and portability across environments. + Develop… more
    Qualcomm (04/16/24)
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  • CPU Design Manager, Silicon

    Google (Mountain View, CA)
    …in people management, developing employees. + Experience with HDL language and front-end design methodology . + Experience with CPU or AI accelerator ... practical experience. + 10 years of experience in high-performance CPU or AI accelerator logic/RTL design including...that power all of Google's services. As a Hardware Engineer , you design and build the systems… more
    Google (05/21/24)
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  • CPU Timing Convergence Lead, Physical…

    Google (Mountain View, CA)
    …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of ... or develop physical design timing convergence tools and flows for advanced CPU designs to achieve outstanding Power Performance Area (PPA). Google is proud to be… more
    Google (05/03/24)
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  • Physical Design Methodology

    quadric.io, Inc (Burlingame, CA)
    …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical ... design methodologies and automation scripts for multiple ...Electrical Engineering with a minimum of eight years of CPU /GPU/ASIC implementation + Proficiency in TCL scripting + Proficiency… more
    quadric.io, Inc (04/06/24)
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  • RTL Analysis Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …make a lasting impact on the world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation team. The team develops and supports ... VLSI organization, our team defines advanced methodologies used to design and develop every NVIDIA chip. NVIDIA chips push...the industry limits of technology and performance for GPU, CPU and SoC markets. What you'll be doing: +… more
    NVIDIA (03/25/24)
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  • SOC Verification and Methodology

    Qualcomm (Santa Clara, CA)
    …Group, Engineering Group > ASICS Engineering **General Summary:** We are looking for an ASIC Design Verification Engineer with strong CPU , ASIC design ... team, you will be responsible for verifying the ASIC low power design , architecture and micro-architecture of by applying advanced low power verification… more
    Qualcomm (05/15/24)
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  • ASIC Engineer , Design Verification

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...with the team to build comprehensive & reusable checking methodology for CPU /GPU like IP (instruction accurate… more
    Meta (05/25/24)
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  • CAD - DV Design Engineer

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design ... Responsibilities + Work with chip leads to understand the design methodology and high level requirements in...develop and verify critical high performance and low power CPU designs. * Anticipates, identifies, and solves highly complex… more
    Qualcomm (05/25/24)
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  • Memory Controller Design Engineer

    Qualcomm (San Diego, CA)
    …controller IP. You will make regular contributions to the overall improvement in design methodology to drive productivity and quality of results. **Preferred ... a smarter, connected future for all. QCT Memory Controller Design Team is looking for ASIC Design ...interfaces to the rest of the system such as CPU , DSP, Multimedia Processors and the engineer more
    Qualcomm (05/01/24)
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  • Senior Physical Design and Timing…

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of ... experience to improve the convergence flows working with the Methodology Team. What we need to see: + BS...stand out from the crowd: + Background in high-performance design , such as CPU , implementation and timing… more
    NVIDIA (03/07/24)
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  • Design Verification Engineer

    Amazon (Sunnyvale, CA)
    Description As a Design Verification Engineer at Amazon, you will be part of an advanced engineering and research team that is building world class hardware for ... resolve blocking issues. Key job responsibilities - Define the verification methodology and implement the corresponding test bench infrastructure in advanced HVL… more
    Amazon (05/03/24)
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  • Physical Design Power Integrity…

    Google (San Diego, CA)
    …might be your next career step. As a Physical Design Power Integrity Engineer , you will define on-die power grid methodology and provide solutions to meet ... benefits at Google (https://careers.google.com/benefits/) . + Define power grid design methodology . + Provide power grid solutions...methodology . + Provide power grid solutions for different design contents ( CPU , GPU, SoC, etc.) to… more
    Google (04/27/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...9. Experience in data path development. 10. Experience in CPU , NOC, Memory and Peripheral Subsystems. 11. Experience with… more
    Meta (05/08/24)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...10. Experience in data path development 11. Experience in CPU , Network protocols, NOC, Memory and Peripheral Subsystems 12.… more
    Meta (05/01/24)
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