- Qualcomm (Austin, TX)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer, you will work with ... teams (RTL, Physical design , Circuits, CAD) to solve key physical design problems in CPU implementations. + Develop innovative techniques in … more
- Qualcomm (Austin, TX)
- …flows, and resolve project-specific issues + Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support ... the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer,...our high-performance place-and-route CAD flow + Architect and recommend methodology improvements to ensure our silicon has the best… more
- NVIDIA (Santa Clara, CA)
- …to work in a dynamic team Ways to stand out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl, Python, Tcl, ... or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding...from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical … more
- Qualcomm (Santa Clara, CA)
- …flows, and resolve project-specific issues + Work closely with worldwide CPU physical design teams, and provide methodology guidance and tools/flows ... Responsibilities:** * Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design to develop… more
- Qualcomm (Folsom, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... design team to develop timing constraints, drive implementation of...with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple… more
- Google (Austin, TX)
- …architecture specifications. + Lead the collaboration with RTL, design verification, and physical design teams to develop CPU implementation. + Drive ... to problems, including Central Processing Unit ( CPU ) performance, micro-architecture design , tool infrastructure, and methodology . + Plan, drive, and… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with emphasis on ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple ...Electrical Engineering with a minimum of eight years of CPU /GPU/ASIC implementation + Proficiency in TCL scripting + Proficiency… more
- Qualcomm (San Diego, CA)
- …support when integrated into the rest of the chip. Synthesis, Timing Closure, Physical Design Support, Gate Level Simulations, Power Analysis are expected to ... will make regular contributions to the overall improvement in design methodology to drive productivity and quality...+ On-chip tightly coupled SRAM & L3 cache controller architecture/ design + Experience with x86 or ARM CPU… more
- Qualcomm (San Diego, CA)
- …support when integrated into the rest of the chip. Synthesis, Timing Closure, Physical Design Support, Gate Level Simulations, Power Analysis are expected to ... interfaces to the rest of the system such as CPU , DSP, Multimedia Processors and the engineer is expected...will make regular contributions to the overall improvement in design methodology to drive productivity and quality… more
- Capgemini (Seattle, WA)
- **Job Role:** **SOC Design Verification Engineer** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design Verification Engineer who can ... based on verification test plan. **Key Responsibilities:** + Drive Design Verification to closure based on defined verification metrics...8 to 10 years of hands-on experience in SystemVerilog/UVM methodology + Experience in one or more of the… more
- Broadcom (San Jose, CA)
- …strong technical hands-on competency in using leading edge physical design EDA tools in projects. + In-depth CPU /DSP architecture/algorithm working ... Key competencies required are: + Working experience in (digital) physical design implementation of large scale ASICs...advanced process nodes. + Opportunity to participate in innovation, design flow and methodology development to address… more
- Qualcomm (Santa Clara, CA)
- …along the way. Roles and Responsibilities + Work with chip leads to understand the design methodology and high level requirements in support of design ... **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification,...* Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design … more
- Qualcomm (Austin, TX)
- …and silicon validation. * A successful candidate requires a strong IP core (preferably CPU ) design & debug background including Project Management of IP team ... The successful candidate will own technical program management for our Oryon CPU Engineering team's development, working alongside the team behind the Snapdragon… more
- Qualcomm (San Diego, CA)
- …the Snapdragon chips powering billions of mobile devices. The position requires ASIC Physical Design or CAD development experience to define and develop ... shortening design cycle time, in close collaboration with Synthesis and Physical design teams. **This role's responsibilities will include:** + Improve the… more
- Siemens (Fremont, CA)
- …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... design . We have a unique company culture. With its...of semiconductor IC industry - ASIC, SoC, Memory, Interconnect, CPU architectures, embedded systems + Ability to work in… more
- Siemens (Fremont, CA)
- …to build a career in a rapidly growing and constantly innovating Electronic Design Automation (EDA) industry? Do you enjoy working with cutting edge technology and ... for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL and… more
- Qualcomm (San Diego, CA)
- …develop tools and methodologies for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing teams. Qualcomm is using leading edge ... responsibilities will include:** + Improving the Timing and Cell Characterization methodology for diverse Mobile, Compute, AI, IoT Snapdragon chips. + Participate… more
- NVIDIA (Santa Clara, CA)
- …and ability to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd: + ... plans for NVIDIA's next generation of high-performance IPs for CPU , GPU and SOC designs. + Owning static timing...(or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools,… more
- Penske (Reading, PA)
- …IBM i, iSeries) platform. You will have an opportunity to lead the design of certain platform components and suggest new technology/tools based on industry and ... platform best practices. Focusing on high-level and technical systems design you will collaborate with Architects and Engineers to...workflow + Identify poorly running processes in production - CPU , plan cache analysis + Execute data fixes +… more