- Qualcomm (Santa Clara, CA)
- …Power with low power design team and implement various optimization techniques to reduce power. Lead Static Timing Analysis , work closely with CAD teams ... on PD STA flow integration and updates; Lead Timing Closure with Automated ECO tools,...Strong Expertise with PrimeTime (PT) for PreLayout and PostLayout Static Timing Analysis + Experience… more
- Google (Mountain View, CA)
- …or a related field, or equivalent practical experience. + 5 years of experience with Static Timing Analysis . + Experience in high speed design timing ... Knowledge of semiconductor device physics and transistor characteristics. + Understanding of Static Timing Analysis including sign-off corner definitions,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- … analysis , place and route, extraction, spice etc. Job Responsibilities: . Perform Static timing analysis , glitch, noise analysis , extraction using ... RC Extraction, power and UPF/CPF concepts. . Execute and lead Tempus timing signoff campaigns at existing...VLSI, Semiconductor, Electrical or Computer Engineering. + Expert in Static Timing Analysis with knowledge… more
- Cadence Design Systems, Inc. (Austin, TX)
- …Equivalence Checking Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required. Good hands-on ... Signoff including Synthesis, Place and Route, Design Closure, and timing /power signoff, RTL to GDSII. Lead technical...experience of Floorplanning , Place and Route, Timing analysis and Sign-off, preferable with CDNS… more
- Siemens Digital Industries Software (Fremont, CA)
- …validate the extraction scripts to facilitate a package level Static Timing Analysis (STA) workflow. The SI/PI Lead will work with the Package and IC ... performing individual for an opportunity to serve as the Signal/Power Integrity Analysis Lead in our 3D IC Solutions Engineering team in driving the development… more
- KBR (Chantilly, VA)
- …tools for collaboration, continuous end-to-end integration and delivery, software development, static code analysis , and test management. + Experience using ... Title: EDAP Technical Lead Belong. Connect. Grow. with KBR! Are you...further. Dive into the world of intelligence gathering and analysis with our top-tier intel unit. You'll work alongside… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …design/EDA experience Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required Prior experience ... and Signoff including Place and Route, Design Closure, and timing /power signoff Guide customers on how to best utilize...tools including Place and Route, IR Drop, backend design timing and power closure Experience with advanced nodes 10nm… more
- Cadence Design Systems, Inc. (Austin, TX)
- …qualified candidate must have demonstrated leadership with successful tapeouts in the field of static timing analysis , hands-on expertise with tool, flow, & ... engineering and other members of solution team. Responsibilities: * Lead customer engagement for Cadence signoff product ( timing...signoff, eco and iR * Subject domain expert in static timing analysis * Hands-on… more
- Honeywell (Phoenix, AZ)
- …Key Responsibilities + Build Requirements, Design and Simulation + Conduct Code Synthesis + Static Timing Analysis / Timing Closure + Integration and Test ... Support + Provide Customer Support + Prepare Documentation + Mentor junior engineers + ASIC/FPGA design using Verilog/VHDL and/or verification using System Verilog/UVM + Good VHDL or Verilog working knowledge + Some travel within US/International may be… more
- The Boeing Company (Kent, WA)
- …Integrate DSP IP from Boeing's algorithm team and third-party IP as needed + Perform static timing analysis , LEC, CDC, linting, and other necessary checks to ... multiple ASIC and/or FPGA Design and Verification Engineers at Lead , Senior & Principal levels to join us as...Engineer on the Boeing Electronic Products team you will lead a growing team and develop state-of-the-art digital ICs/SoCs… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …EDA tools is required, ie; Genus, Design Compiler, Innovus, ICC2, Conformal, Tempus, STA, Static Timing Analysis , PrimeTime, Modus, and/or Voltus is highly ... desired + Experience in a scripting language such as TCL/Perl/Python + MS in EE or CE with 6-8 years' experience or BS with 8+ years' experience + Candidate should have strong customer-facing communication and problem solving skills + Strong personal drive for… more
- NVIDIA (Santa Clara, CA)
- …ADC etc. + Hands on experience running Spice simulations, EM/IR analysis , and static timing analysis /closure + Experience with spice simulation for noise ... challenging and exciting role in improving the netlist and timing quality of our designs and if you are...of Nvidia's next generation products by performing detailed transistor-level analysis on the design. + Drive the design and… more
- RTX Corporation (Cedar Rapids, IA)
- …and timing constraints. + Perform device synthesis, place and route. + Perform static timing analysis , linting analysis , and clock-domain-crossing ... and Image processing devices to meet system's requirements. + Recommend and lead functional strategies to advance the Complex Hardware discipline and products. +… more
- Cadence Design Systems, Inc. (Austin, TX)
- …industry experience. Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required. Prior experience ... communication skills. Preferred Good hands-on experience of Floorplanning , Place and Route, Timing analysis and Sign-off, preferable with CDNS tools suite Prior… more
- Arrow Electronics (Plymouth, MN)
- …in multi-disciplinary teams. + Background in BIST, Design for Test (DFT), physical synthesis, static timing analysis , and/or power analysis . + Direct ... Senior DFT Engineer (eInfochips Inc) **Job Description:** **What You'll Be Doing:** + Lead efforts to map customer designs into Honeywell's ASIC technology + … more
- Honeywell (Plymouth, MN)
- …in multi-disciplinary teams - Background in BIST, Design For Test (DFT), physical synthesis, static timing analysis , and/or power analysis - Direct ... developing new products and processes to support business objectives. Responsibilities: - Lead efforts to map customer designs into Honeywell's ASIC technology -… more
- The Boeing Company (Kent, WA)
- …to architect block-level design specifications. + Perform HDL coding, logical equivalency checking, static timing analysis , CDC, and linting. + Integrate ... functional coverage models and ensure code coverage closure. + Lead the analysis of customer and system requirements, and develop architectural approaches… more
- City of New York (New York, NY)
- …Sections. The Reliability Centered Maintenance Engineer will provide technical lead responsibilities for the day-to-day implementation of the Reliability Centered ... Facilities SCADA systems, the WRRF SCADA system(s) and network of mobile and static sensors (vibration, IR, pipe thickness, etc.). For the assigned facilities, the… more
- Cummins Inc. (Columbus, IN)
- …development, coding, compiling and test. Tools include Simulink, code editors, integration tools, static analysis tools, compilers and hardware in the loop test ... with greater elements of ambiguity over the senior or lead engineer level and with full accountability to the...of Cummins' products. + Product Function Modeling, Simulation and Analysis - Impacts product design decisions through the utilization… more
- Chenega Corporation (Reston, VA)
- …collection systems with Subject Matter Expertise. + Conduct propagation modeling and analysis for communications, bistatic, multi- static , and monostatic radar. + ... Assist with the preparation of government CDRLs as requested by the Project Lead . + Provide pre-deployment, and post-deployment support of current and future SCS… more