• Low Power ASIC

    NVIDIA (Santa Clara, CA)
    …make a lasting impact on the world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2025. We continue to rapidly ... to deliver exceptional perf/watt solutions in a wide range of sectors. Come join NVIDIAs Low Power DV team to develop state of the art GPUs to power AI,… more
    NVIDIA (06/03/25)
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  • Low Power ASIC

    Qualcomm (San Diego, CA)
    ASIC engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
    Qualcomm (05/17/25)
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  • ASIC and/or FPGA Design & Verification…

    The Boeing Company (Tukwila, WA)
    …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. And we're applying the latest...determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC more
    The Boeing Company (05/30/25)
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  • Digital ASIC Design Engineer

    Qualcomm (San Diego, CA)
    …with mixed-signal IPs, such as SerDes, DDR, and Die-to-Die links - Experience in low - power digital design - Experience in creating tools and automation flows (in ... Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing...- Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist… more
    Qualcomm (04/19/25)
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  • ASIC Engineer , Physical Design

    Meta (Austin, TX)
    …for individuals with experience in backend implementation from Netlist to GDSII in low power and high-performance designs to build efficient System on Chip ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop...and power grid planning 19. Experience with low power implementation, power gating,… more
    Meta (06/14/25)
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  • ASIC Engineer , Formal Verification

    Meta (Lincoln, NE)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...in clock domain crossing, IP-XACT based register verification and low power 21. Experience with development of… more
    Meta (03/22/25)
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  • ASIC Implementation Engineer

    Meta (Sunnyvale, CA)
    …Memories. 20. Knowledge of STA signoff and understanding of AOCV, POCV 21. Experience with low power techniques for reducing power . 22. Experience with EDA ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical… more
    Meta (06/06/25)
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  • Sr. ASIC Design Engineer

    Amazon (Austin, TX)
    …design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area ... Description Amazon Web Services provides a highly reliable, scalable, low -cost infrastructure platform in the cloud that powers hundreds of thousands of businesses… more
    Amazon (06/14/25)
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  • ASIC Design Engineer

    Broadcom (San Jose, CA)
    …Tcl scripting skill Other highly desirable experience: o 802.3 Ethernet or NIC experience. o Low power design skills o Layer 1 through Layer 4 experience The ... challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from… more
    Broadcom (04/26/25)
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  • Analog/Mixed Signal ASIC Design…

    Qualcomm (San Diego, CA)
    …integrated circuit designers at various levels to help with designing high-performance and low - power mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... design by course selections and/or work experience. + Experience working with ASIC design tools such as Cadence Virtuoso. **Preferred Qualifications** + Several… more
    Qualcomm (04/23/25)
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  • Sr. ASIC Modem Design Engineer

    Amazon (San Diego, CA)
    …communities around the world. Come work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing… more
    Amazon (06/05/25)
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  • ASIC Design Efficiency Engineer

    NVIDIA (Santa Clara, CA)
    …processor or deep learning accelerator design/architecture experience + Performance verification, low power or physical (synthesis/VLSI) design experience + ... We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is...and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA) improvements. + Execute and deliver… more
    NVIDIA (06/15/25)
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  • Senior ASIC Design Engineer

    Amazon (Austin, TX)
    …any necessary support logic . Configure, instantiate and integrate 3rd party IP blocks . Understand low power design & the impact of DFT on the blocks . Perform ... Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband… more
    Amazon (06/03/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Westford, MA)
    …will be doing: + You will drive physical design and timing of high-frequency and low - power DPUs and SoCs at block level, cluster level, and/or full chip level. ... human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering… more
    NVIDIA (05/14/25)
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  • ASIC Engineer , IP Design, Silicon

    Google (Mountain View, CA)
    …years of industry experience with IP design. + Experience with methodologies for low power estimation, timing closure, synthesis. + Experience with methodologies ... like Python or Perl. + Experience with ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: + Master's degree or PhD in Electrical… more
    Google (06/14/25)
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  • Hardware Development Engineer II,…

    Amazon (North Reading, MA)
    …our customers love. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology....3+ years of demonstrable experience as a computer hardware engineer . - Strong knowledge of hardware design principles, testing… more
    Amazon (06/03/25)
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  • Sr. CAD Engineer , ASIC

    Amazon (Sunnyvale, CA)
    Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...experience with emphasis on methodology and best practice - Power estimation and optimization - Back end tool experiences… more
    Amazon (06/11/25)
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  • ASIC Test Engineer , Annapurna…

    Amazon (Austin, TX)
    …for both inference and training workloads. We are seeking a semiconductor test engineer with a background in classic ATE platforms to create a clean running ... extremely low DPPM product-line forming the foundation to our servers....trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences.… more
    Amazon (06/07/25)
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  • ASIC Verification Engineer , Rbks…

    Amazon (Austin, TX)
    …to post-silicon validation. The team works backwards from customer requirements to build super- low power , energy efficient designs that include the latest in AI, ... video processing, low power communications and CMOS fabrication technology. Key job responsibilities - Use and/or build bit accurate C models - Evaluate block… more
    Amazon (06/04/25)
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  • ASIC Physical Design Engineer

    Amazon (Austin, TX)
    …which is a machine learning inference accelerator designed to deliver high performance at low cost. If this sounds exciting to you - come build the future with ... in various aspects of physical design: full chip floorplanning, circuit analysis, power /clock distribution, timing optimization, place and route, power integrity… more
    Amazon (06/17/25)
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