• Senior ASIC Front End

    NVIDIA (Santa Clara, CA)
    …efficiency and support + Improve the speed, flexibility and extensibility of the GPU front end build flow + Keep the GPU Continuous Integration system at ... NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position… more
    NVIDIA (04/30/25)
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  • Sr. SOC/ ASIC Timing Signoff & Front

    SpaceX (Irvine, CA)
    Sr. SOC/ ASIC Timing Signoff & Front - End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT - END ...as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front - End STA Engineer/ Senior : $160,000.00 -… more
    SpaceX (04/15/25)
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  • Senior ASIC Design Verification…

    Cisco (San Jose, CA)
    …DV, DFT, physical design, and post-silicon validation The team comprises micro-architects, front - end designers, and verification engineers. Cisco is a system ... What You'll Do * You will participate in the ASIC design verification for Cisco high- end switching products. * Development of simulation models, test plans,… more
    Cisco (03/05/25)
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  • Senior Principal Digital Engineer (FPGA…

    Northrop Grumman (Baltimore, MD)
    …fields + Active DoD Top Secret Clearance or higher + Experience with industry standard ASIC front - end design tools for synthesis, LEC, CDC + Experience with ... for you to join our team as a Principal Digital Engineer/ Senior Principal Digital Engineer (FPGA and ASIC Design) based out of Linthicum, MD. **What You'll get… more
    Northrop Grumman (04/08/25)
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  • Senior ASIC Verification…

    NVIDIA (Santa Clara, CA)
    …be doing: + Improve the speed, flexibility, and extensibility of the High-Speed IO front end integration, build, and verification flows + Apply best in class ... NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in...of relevant industry experience + Exposure to computer architecture, ASIC design, and verification methodology is required + Experience… more
    NVIDIA (03/27/25)
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  • Digital ASIC Design Engineer for High-Speed…

    Qualcomm (San Diego, CA)
    …power, performance, and area of the IPs - Assist in running the full suite of front - end ASIC design tools (lint checking, CDC, DFT, synthesis, FV, STA, etc.) ... Summary:** Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our...experience in micro-architecture and RTL design - Proficiency with front - end ASIC design tools such… more
    Qualcomm (04/19/25)
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  • ASIC /FPGA Research Engineer - Digital…

    University of Southern California (Arlington, VA)
    …opening in Arlington, VA for anASIC/FPGA Research Engineer - Digital Design, to perform front - end digital design of advanced ASIC or FPGA-based prototypes ... ASIC /FPGA Research Engineer - Digital DesignApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/ ASIC -FPGA-Research-Engineer… more
    University of Southern California (02/19/25)
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  • ASIC CAD Engineer

    Fortive Corporation (Beaverton, OR)
    …CAD Engineer to: + Develop, enhance, and maintain analog, mixed signal, and digital front and back- end flows. + Support electrical and multi-physics modeling and ... our team. The successful candidate will work with a Senior CAD Engineer to customize CAD/EDA software from vendors...to create, modify, and maintain an intuitive and automated ASIC design environment. In this role you will acquire… more
    Fortive Corporation (03/27/25)
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  • ASIC DFT Verification Technical Leader

    Cisco (San Jose, CA)
    senior DFT verification lead in San Jose, CA. You will work with Front - end RTL teams, backend physical design teams to understand chip architecture and drive ... high-quality DFT verification. What You'll Do: * Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the… more
    Cisco (04/18/25)
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  • Senior Manager, Engineering Manager

    L3Harris (Anaheim, CA)
    …industry. With customers' mission-critical needs always in mind, our employees deliver end -to- end technology solutions connecting the space, air, land, sea and ... cyber domains in the interest of national security. Job Title: Senior Manager, Engineering Manager Job Code: 22201 Job Location: Location: Anaheim, CA. Job Schedule:… more
    L3Harris (03/30/25)
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  • Senior Manager - Phased Array Antenna…

    Amazon (Redmond, WA)
    …simulation tools (MATLAB, ADS), and lab test automation. - Experience collaborating with ASIC teams, including front - end interface and control development. - ... in phased array antennas, overseeing innovation at the intersection of RF, antenna, ASIC , and communication systems. This is a rare opportunity to shape and lead… more
    Amazon (04/12/25)
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  • Senior Electrical Engineer (FPGA Design)

    L3Harris (Camden, NJ)
    …are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a ... with every other Friday off Job Description: Reporting to the Manager, Engineering ( ASIC /FPGA), the Senior Member of Engineering Staff (SMES) will be part… more
    L3Harris (03/27/25)
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  • Senior Synthesis Flow Development Engineer

    NVIDIA (Santa Clara, CA)
    …diverse team creating NVIDIA's chip design methodology! We're responsible for the Front - End Design Implementation methodology for all of NVIDIA's semiconductor ... design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams...experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools… more
    NVIDIA (03/18/25)
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  • Senior Antenna Engineer, Kuiper Antennas…

    Amazon (Redmond, WA)
    …challenge assumptions. - Build and test active phased array prototypes and front - end circuits. - Influence and define system-level requirements in collaboration ... phased array antennas, drive innovation in RF, antenna, custom ASIC , and communication systems. This role offers a unique...hybrids, combiners - Experience with active RF circuits and front - end design - Experience in phased array… more
    Amazon (04/04/25)
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  • Senior Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …changes and improved / drive timing to closure. + The position will interact with both Front End (Design / DFT) and Back End Implementation Teams (P&R). + ... and passionate engineering team building the next Palladium Emulation ASIC and system at Cadence Design System. Palladium has...computer engineering with a minimum of 10 years of ASIC Design experience OR MS with a minimum of… more
    Cadence Design Systems, Inc. (04/17/25)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front - end design + Proficiency in SystemC, SystemVerilog, or Verilog ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...+ Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements:… more
    quadric.io, Inc (03/11/25)
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  • Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …group is seeking a Senior Silicon Engineer. You will join our front - end silicon team and be responsible for delivering cutting-edge, high performance, low ... power, scalable and programmable DPU silicon. As a Senior Silicon Engineer in the Data Processing Unit team...micro-architecture specification and RTL development of design modules for ASIC memory subsystem. + Review and provide feedback on… more
    Microsoft Corporation (04/30/25)
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  • Senior SOC Pre-Silicon Verification…

    Micron Technology, Inc. (Richardson, TX)
    …HIG (High Bandwidth Memory - Heterogenous Integration Group), we innovate and integrate end -to- end groundbreaking front - end and backend processes with ... based on the gate-level design only while the Logic chip can use a full ASIC flow. Lastly, verification and testing (validation) of HBM is the most challenging due… more
    Micron Technology, Inc. (04/19/25)
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  • Sr. Design Verification Manager, Annapurna Labs

    Amazon (Cupertino, CA)
    …level degree in computer science or electrical engineering - Hands on experience with front - end logic design Amazon is an equal opportunity employer and does not ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (02/16/25)
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  • Sr. MMIC Design Engineer (Silicon Engineering)

    SpaceX (Redmond, WA)
    …compatibility in all aspects of implementation in the system + Simulate/model MMIC front end circuits (power amplifiers, low noise amplifiers, switches) at the ... and electromagnetic level, working with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software...Deep understanding of theory and MMIC design of RF front end blocks, from S-band to E-band… more
    SpaceX (04/15/25)
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