- Draper (Boston, MA)
- …Description Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
- US Tech Solutions (Goleta, CA)
- … verification prior to tape-out. **Responsibilities:** + Perform pre-silicon functional verification of digital designs using UVM and SystemVerilog ... of high-performance SoCs and related subsystems. + This role requires a senior -level verification engineer who can work independently and take ownership of… more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer/ Senior Principal Digital Verification Engineer ... NC. This requisition may be filled as a Principal Digital Verification Engineer or a Senior...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Northrop Grumman (Jessup, MD)
- …**a Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer:** + Bachelor's ... Secret/SCI security clearance with Polygraph** **.** **Preferred Qualifications Principal / Senior Principal Digital Verification Engineer:** + Advanced… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer. In this highly ... PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and… more
- BAE Systems (Westminster, CO)
- …scripting languages (eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and embedded processor ... Other incentives may be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR**… more
- BAE Systems (Cedar Rapids, IA)
- …to execute their precision navigation missions. BAE is looking for experienced senior level ASIC/FPGA Design Verification Engineers who can plan, architect, ... incentives may be available based on position level and/or job specifics. ** Senior Engineer - ASIC/FPGA Verification (hybrid)** **119641BR** EEO Career Site… more
- BAE Systems (Nashua, NH)
- …growing your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and ... Other incentives may be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)**… more
- Amazon (San Diego, CA)
- …or Ph.D degree in Electrical / Communications Engineering - 10+ years in digital verification , preferably in communication systems - Familiarity with Matlab - ... Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM , SystemC and DPI-C .… more
- BAE Systems (Westminster, CO)
- …tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. + Experience with OVM/ UVM Verification methodologies. + Ability to work requirements and ... US Secretary of Education, US Department of Education. + Verification experience with to include partitioned digital ...be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K… more
- Data Device Corporation (Bohemia, NY)
- Senior Engineer ( Verification Engineer) Department:Software Engineering 3i0636 Location:Bohemia, NY For more than 60 years, Data Device Corporation (DDC) has ... related field). + Experience: 8-15 years of hands-on experience in FPGA verification and development of complex digital systems, utilizing advancedverification… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
- Northrop Grumman (Jessup, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer, you will have an opportunity to be a part ... encouraged, all within a culture of design. We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The… more
- Lockheed Martin (Denver, CO)
- …verification plan for a given design\. * Use SystemVerilog and Universal Verification Methodology \( UVM \) to verify a design in a Linux\-based ... in this role, you will need:** * ASIC/FPGA verification experience with modern verification methodologies such as UVM , OVM or VMM\. * 3\+ years professional… more
- NVIDIA (Santa Clara, CA)
- …design for test, timing constraints, and static timing analysis. + Experience with industry verification methodologies, such as UVM . Ways to stand out from the ... equivalent experience. + 5+ years of experience in high-speed digital design, proficient with front-end design flow and tools....such as CDR, DFE, CTLE, TXFIR. + Experience with digital assist analog designs, such as calibrations. + Familiarity… more
- Cisco (Maynard, MA)
- …empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Technical Lead Engineer will be working on next-generation 100G-1.6T coherent ... optical communications products. This role is for a senior contributor & technical leader focused on verifying highly complex ASICs that are used in these… more
- SpaceX (Sunnyvale, CA)
- …the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system level + Write and ... degree in electrical engineering or computer engineering + Experience with verification methodologies such as UVM /OVM/VMM + Strong object-oriented programming… more
- NVIDIA (Santa Clara, CA)
- Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team ... such as filters and analog calibration circuits + Ensure verification of digital designs using direct and...protocols like Ethernet and PCIe + Experience with industry-standard verification methodologies, such as UVM + Proficiency… more
- Amazon (San Diego, CA)
- …block . Work with the verification team and participate in System level verification using test benches constructed using UVM , System C and DPI-C . Ensure ... Be part of Amazon Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon… more