- Draper (Boston, MA)
- …Description Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
- The Boeing Company (Mesa, AZ)
- …Find your future with us. Boeing AvionX has an exciting opportunity ** UVM Advance Verification FPGA Engineer** at Lead or Senior level to join us as part of ... Break from Christmas to New Years. We are seeking UVM Advance Verification engineers who are ambitious...verification artifacts, and leading or supporting FPGA milestone verification reviews. Senior candidates will also drive… more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer/ Senior Principal Digital Verification Engineer ... NC. This requisition may be filled as a Principal Digital Verification Engineer or a Senior...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... choice to join our diverse team today! As a Senior Digital Design Verification Engineer...models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM . + Build… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Huntington Ingalls Industries (Roanoke, VA)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Northrop Grumman (Annapolis Junction, MD)
- …**a Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer:** + Bachelor's ... Secret/SCI security clearance with Polygraph** **.** **Preferred Qualifications Principal / Senior Principal Digital Verification Engineer:** + Advanced… more
- BAE Systems (Westminster, CO)
- …scripting languages (eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and embedded processor ... Other incentives may be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR**… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer. In this highly ... PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and … more
- Tarana Wireless (Milpitas, CA)
- …that you will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate ... as Python What You'll Need: + BSEE required/MSEE preferred + 5-12 years of related Verification experience + Strong knowledge of UVM + Proficiency with at least… more
- Amazon (Boise, ID)
- …with team members across multiple disciplines - Deliver detailed test plans for verification of complex digital design blocks by working with design engineers ... and architects - Create and enhance constrained-random verification environments using SystemVerilog and UVM and write SVA. - Identify and write all types of… more
- BAE Systems (San Diego, CA)
- …growing your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and ... Other incentives may be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)**… more
- The Boeing Company (Mountain View, CA)
- …Weapons Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead, or Senior ) to join us as part ... low SWAP-C flight computers. And we're applying the latest digital IC design processes with industry-best tools to enable...is a unique time where we're hiring design and verification engineers at every level as we're only limited… more
- BAE Systems (Westminster, CO)
- …tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. + Experience with OVM/ UVM Verification methodologies. + Ability to work requirements and ... US Secretary of Education, US Department of Education. + Verification experience with to include partitioned digital ...be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
- Northrop Grumman (Annapolis Junction, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer, you will have an opportunity to be a part ... encouraged, all within a culture of design. We are seeking an exceptional Senior Functional Verification Engineer specializing in ASIC and FPGA technologies. The… more
- Lockheed Martin (Denver, CO)
- …verification plan for a given design\. * Use SystemVerilog and Universal Verification Methodology \( UVM \) to verify a design in a Linux\-based ... independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with...systems thinking skills to solve * Experience with modern verification methodologies such as UVM , OVM or… more
- Data Device Corporation (Bohemia, NY)
- Senior Engineer ( Digital Design - VHDL) Department:Sr.Eng/Mgr./Dir./VP Location:Bohemia, NY For more than 50 years, Data Device Corporation (DDC) has been ... Accountabilities: + Design and Development:Lead the design, development, and optimization of digital circuits and systems using VHDL. + Verification and… more
- SpaceX (Sunnyvale, CA)
- …the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system level + Write and ... degree in electrical engineering or computer engineering + Experience with verification methodologies such as UVM /OVM/VMM + Strong object-oriented programming… more
- NVIDIA (Santa Clara, CA)
- …design for test, timing constraints, and static timing analysis. + Experience with industry verification methodologies, such as UVM . Ways to stand out from the ... equivalent experience. + 5+ years of experience in high-speed digital design, proficient with front-end design flow and tools....such as CDR, DFE, CTLE, TXFIR. + Experience with digital assist analog designs, such as calibrations. + Familiarity… more