- Northrop Grumman (Aurora, CO)
- …and Static Timing Analysis would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's degree with 8 years of ... and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding of digital design concepts + Responsible with … more
- BAE Systems (Westminster, CO)
- …Other incentives may be available based on position level and/or job specifics. ** Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR** ... by the US Secretary of Education, US Department of Education. + Solid FPGA/ ASIC Verification development methodology. + Experience with System Verilog and UVM, and… more