- SLAC National Accelerator Laboratory (Menlo Park, CA)
- ASIC Design Engineer Job ID 5683 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position Overview:** SLAC National Accelerator ... Laboratory seeks an Application Specific Integrated Circuit ( ASIC ) design engineer within the Integrated Circuits Department of the Instrumentation Division… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Lead the… more
- Meta (Menlo Park, CA)
- …**Preferred Qualifications:** Preferred Qualifications: 18. 4+ years of experience in ASIC Design , Development or Validation (Silicon bringup, validation, ... **Summary:** Meta is seeking an Engineer to join our Release to Production (RTP)...I2C, SPI, USB, and/or PCIe. 25. Knowledge of of ASIC design flow, ASIC prototyping… more
- Meta (Menlo Park, CA)
- …**Preferred Qualifications:** Preferred Qualifications: 17. 5+ years of experience in ASIC Design , Development or Validation (Silicon bringup, validation, ... **Summary:** Meta is seeking an Engineer to join our Release to Production (RTP)...I2C, SPI, USB, and/or PCIe. 24. Knowledge of of ASIC design flow, ASIC prototyping… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... MS or Ph.D. in Electrical Engineering with a minimum of eight years of CPU/GPU/ ASIC implementation + Proficiency in TCL scripting + Proficiency in chip front-end and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging Engineer for its Ecosystem and Technical Operation team. The ideal candidate will be able to ... and efficient machine learning platforms.We are building a competency in packaging design and technology to support the development of custom silicons for… more
- Meta (Menlo Park, CA)
- …and remote teams and suppliers, to define product roadmap and program. 2. Specify, design , and develop CPU/GPU/ ASIC based compute hardware solutions, and ASIC ... **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our...Support hyper-scale deployment and obtain learning for next generation design . 5. Collaborate with open source hardware community to… more
- Meta (Menlo Park, CA)
- …and remote teams and suppliers, to define product roadmap and program. 2. Specify, design , and develop CPU/GPU/ ASIC based compute hardware solutions, and ASIC ... **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our...Support hyper-scale deployment and obtain learning for next generation design . 5. Collaborate with open source hardware community to… more
- Capgemini (San Francisco, CA)
- …their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors ... It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI,… more
- Meta (Menlo Park, CA)
- …reliability, scalability, and efficiency. **Required Skills:** Data Center Network Engineer Responsibilities: 1. Design network topologies and configuration ... at Meta are hybrid software and network engineers who design , build, and operate our worldwide Data Center network....Understanding of different Optics and internals of a switch ASIC 20. Familiarity with the Linux based systems 21.… more
- quadric.io, Inc (Burlingame, CA)
- …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog + ... processor architecture. As a senior member of our chip design team, you will contribute to all stages of...you will contribute to all stages of the processor design cycle. Requirements + Contribute to the definition of… more