- Amazon (Austin, TX)
- …be responsible for defining and checking the specification of critical hardware modules using formal methods and industrial model checkers. You will be a part of a ... 2024 and September 2025 * Completed coursework or prior internship experience with formal methods (SW/HW) * Coursework or prior internship experience in the basics… more
- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely ... functional coverage Who You Are * You are an ASIC Design Verification Engineer with...MMU. * Experience with Veloce/HAPS is a plus * Formal verification (iev/vc formal ) knowledge… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation. 14.… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 12.… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... you will be able to use other approaches like Formal and Emulation to achieve a bug-free design. The...teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Lead the… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... you will be able to use other approaches like Formal and Emulation to achieve a bug-free design. The...teams towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities:… more
- Qualcomm (San Diego, CA)
- …products. This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete ... such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage… more
- Amazon (Redmond, WA)
- …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks to ensure ... in communication systems - Familiarity with Matlab - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is committed… more
- Qualcomm (San Diego, CA)
- …power, high performance ASIC /SoC design flows (micro-architecture, RTL design, verification , synthesis, timing/STA, UPF, CLP, LEC formal verification , ... compute, AI and XR space. An ideal candidate will oversee definition, design, verification , and documentation for ASIC development for a variety of products.… more
- SpaceX (Sunnyvale, CA)
- …and analysis of various IPs into RTL + Develop/modify/run RTL logic synthesis, formal verification , power intent verification and post synthesis timing ... SOC/ ASIC Synthesis & Front-End STA Engineer ...development for block and SOC top + Familiar with formal verification and implementing functional ECOs +… more
- Amazon (North Reading, MA)
- …preferably in areas of image processing. - Familiarity with Matlab - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- ASIC Design Engineer Job ID 5683... of active circuits. + Top-level simulations to validate ASIC integration. + Document design towards formal ... SLAC National Accelerator Laboratory seeks an Application Specific Integrated Circuit ( ASIC ) design engineer within the Integrated Circuits Department of… more
- NVIDIA (Santa Clara, CA)
- …with all stages in the ASIC design flow including functional and formal verification , emulation, DFT, synthesis & timing analysis, power estimation and ECO. ... for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of...SOCs. + You will work extensively with design and verification teams and take part in IP core and… more
- Cisco (Maynard, MA)
- …generation 100G-1T coherent optical communications products. The senior physical design engineer will be focused on delivering highly-complex ASICs in advanced ... focused environment. Who you'll work with: You will collaborate with Acacia's ASIC and Hardware teams in the engineering organization to deliver tape-out quality… more
- Northrop Grumman (Dulles, VA)
- …are not only part of history, they're making history. We have openings for a **FPGA/ ASIC Engineer ** to join our team of qualified, diverse individuals in the ... as oscilloscopes and logic analyzers. + Generation of Test Benches and support of formal VHDL Verification The Northrop Grumman Tactical Space Division is a… more
- Micron Technology, Inc. (Minneapolis, MN)
- …+ Experience with industry-standard tools related to synthesis, linting, equivalency, and formal verification . + Candidate should be collaborative, curious, and ... exciting and outstanding opportunity. As a Sr. Digital Design Engineer in Micron's ASIC logic design team,...+ Interact with FEOL and BEOL teams from Design Verification , Analog Design, and Modeling to Synthesis and Physical… more
- Meta (Menlo Park, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems. 11. Experience with Synthesis, Timing Closure and Formal Verification Methodology. 12. Master's or PhD… more
- Meta (Menlo Park, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems 12. Experience with Synthesis, Timing Closure and Formal Verification Methodology 13. Master's or PhD… more