- Google (Sunnyvale, CA)
- …subsystem design architecture and microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC /SoC products according to ... that power all of Google's services. As a Hardware Engineer , you design and build the systems...(DV) teams to create testplans for, verify, and debug design RTL . + Work with physical … more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER , DDR IP...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
- BAE Systems (San Jose, CA)
- …are seeking a very senior level engineer to: + Design and RTL coding of high-speed digital circuits on ASIC /FPGAs from concept to production. + Defining ... be available based on position level and/or job specifics. **Senior Principal ASIC Design Engineer (Hybrid)** **95186BR** EEO Career Site Equal Opportunity… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... job responsibilities - As a key member of the ASIC design team, you will implement and...related technical field - 5+ years of experience in RTL design for SOC - 5+ years… more
- NVIDIA (Santa Clara, CA)
- …those, and incorporating those in NVIDIA's designs + Apply knowledge and gain experience in ASIC design including RTL and logic design , physical and ... looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to...to work across different domains of ASIC design , collaborate and work with Arch, RTL ,… more
- SpaceX (Sunnyvale, CA)
- SOC/ ASIC Synthesis & Front-End STA Engineer ...design and timing closure + Deep understanding of ASIC design flow, top-down and bottom-up ... the ultimate goal of enabling human life on Mars. SOC/ ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the… more
- NVIDIA (Santa Clara, CA)
- …+ 5 years of proven experience with tools and methodologies for ASIC design and verification. + Direct experience with RTL Linting EDA tools. + Proficiency ... world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation...to provide methodology insights. + Act as liaison between ASIC designers and EDA vendors. What we need to… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... take part in IP core and IP integration level RTL design , synthesis, functional verification, and timing...years of meaningful experience with all stages in the ASIC design flow including functional and formal… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Display ASIC Design Engineer ! NVIDIA is seeking a passionate ASIC Design Engineers to craft and implement display subsystem ... Computer Architecture, Computer Arithmetic, Image/Pixel processing algorithms. + Good understanding of ASIC design flow including RTL design , CDC, logic… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Engineer , Design to join our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, ... engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Design (University Grad)...Design , and Verification reviews and provide feedback. 2. Design and develop RTL or HLS code… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities:...scratch. 10. Experience debugging fails to the line of RTL , closing out bug fixes, using Verdi or equivalent… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON...Experience with scripting languages, eg Python for automation + RTL design , chip bring-up, and post-silicon validation… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Work on architecture exploration and ... micro-architecture development. 2. Perform RTL development using Verilog, System Verilog and HLS. 3....12. 5. Logic synthesis and optimization 13. 6. Physical Design (ECO) and 14. 7. Hardware/ ASIC lab… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...of relevant and proven experience and a background in ASIC design (Graphics, Microprocessors, Network Processors, or… more
- Cisco (San Jose, CA)
- …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... or Master's degree in Electrical or Computer engineering. * 8+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. *… more
- NVIDIA (Santa Clara, CA)
- …flow experience + Hold a basic sense of verification methodology + Good understanding of ASIC design flow including RTL design , verification, logic ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design ...modules (Fuse, Strap, Floorsweep, In-silicon measurement, Reset, Sysctrl) + RTL design , synthesis, timing + Silicon bring-up… more
- Amazon (Sunnyvale, CA)
- Description As a Sr. ASIC Design Engineer , you work with a team creating hardware accelerator IP to be deployed in a range of Amazon devices. You will ... IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional...architectural models and algorithms in C/C+ - Experience in RTL coding and debug, as well as performance/power/area analysis… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development. 3. RTL development using Verilog, System Verilog and HLS. 4.… more
- Meta (Menlo Park, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more