- SpaceX (Sunnyvale, CA)
- SOC / ASIC Synthesis & Front -End STA Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where ... to make this possible, with the ultimate goal of enabling human life on Mars. SOC / ASIC SYNTHESIS & FRONT -END STA ENGINEER (SILICON ENGINEERING) At SpaceX… more
- NVIDIA (Santa Clara, CA)
- … engineer to join the team. The Team is responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency...able to engage with multiple teams and design the SOC clocks to satisfy all the architectural constraints. +… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** A SOC Physical Design Engineer plays a crucial role in the development and ... processes, and an understanding of timing closure, clock tree synthesis , power optimization, and physical verification methodologies. Additionally, communication… more
- NVIDIA (Santa Clara, CA)
- …computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip ( SOC ) group is looking for a top ASIC Engineer with a curiosity ... Are you looking for a SOC Design Engineer opportunity? If yes, come and...GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design, CAD, Package Design, Software, DFT and… more
- Amazon (Sunnyvale, CA)
- …and Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis , Place & Route and other local/remote teams to address the design ... - Flow for STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. - Full chip timing constraints development, full chip / Sub-System STA and… more
- Microsoft Corporation (Sunnyvale, CA)
- … synthesis , timing, and power analysis + 4+ years of technical experience in SOC Integration. + Experience in delivery of ASIC IPs, sub-systems and/or top ... leader. + Demonstrated expertise in Computer Architecture, Digital Design, IP and SOC development. + Experience with front -end tools (Verilog simulators,… more