- Qualcomm (Santa Clara, CA)
- …ASIC Design Verification Engineer with strong CPU, ASIC design and verification fundamentals to work in Qualcomm's Global SOC team. This position offers ... for the future. **The JOB** + As a member of the Global SOC Lower Power verification team, you will be responsible for verifying the ASIC low power design,… more
- Google (Sunnyvale, CA)
- …that goes into our cutting-edge data centers affecting millions of Google users. As a SoC Design Engineer , you will join a team working on SoC -level ... with software, system hardware, and other cross-functional teams + Experience defining SoC IP interfaces and methodologies. Experience designing SOC chassis… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, to firmware, and algorithms.We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software ... and mapping software pipelines to the dedicated hardware accelerators. **Required Skills:** SoC Modeling ASIC Engineer Responsibilities: 1. Analyze the software… more
- SpaceX (Sunnyvale, CA)
- SOC /ASIC Synthesis & Front-End STA Engineer ...with power intent and upf development for block and SOC top + Familiar with formal verification ... the ultimate goal of enabling human life on Mars. SOC /ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...IPs into RTL + Develop/modify/run RTL logic synthesis, formal verification , power intent verification and post synthesis… more
- NVIDIA (Santa Clara, CA)
- We are looking for SOC Design Engineer ! The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a ... SOC ) group is looking for a top ASIC Engineer with a curiosity about SOC design...integration, chip build and assembly, and padring design and verification . You should have real passion for methodologies and… more
- SpaceX (Irvine, CA)
- SOC Physical Design STA/Timing Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SOC /ASIC PHYSICAL DESIGN STA/TIMING ENGINEER (SILICON ENGINEERING)...physical design flow + Work with systems and architecture, SOC integration, verification , DFT, mixed signal, IP… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking to hire a senior verification architect to design verification methodology for our next generation SOCs with AI capabilities for ... and next generation SoCs. + Design and implement new verification methodology solutions, including TB architecture, test...engineer with a real passion for improving design verification efficiency and pushing barriers? If so, we want… more
- Amazon (San Diego, CA)
- …STA) into SoC timing signoff flow. - Work for Systems and Architecture, SoC Integration, Verification , DFT, Mixed Signal, IP owners, Synthesis, Place & Route ... Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our...& Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA,… more
- Qualcomm (Santa Clara, CA)
- …**Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** A SOC Physical Design Engineer plays a crucial role in the ... of timing closure, clock tree synthesis, power optimization, and physical verification methodologies. Additionally, communication skills and the ability to work in… more
- ManpowerGroup (San Jose, CA)
- …ecosystem to innovate in an unparalleled time to market. **You Are:** An experienced SoC Integration Engineer **The Work:** The ideal candidate can help along ... have 100+ years of cumulative hands-on experience in architecture, logic design, verification , physical design, emulation and firmware. We use the latest silicon… more
- Microsoft Corporation (Mountain View, CA)
- …and augmented reality. We are looking for a Principal Front End Design Methodology Engineer to work in the dynamic Microsoft Artificial Intelligence System ... on Chip (AISoC) Silicon team. As the Front End Methodology Engineer , you will be responsible for...methodologies for multiple SOCs + Thorough understanding of end-to-end SOC design cycles and dependencies between design, verification… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …place&route and signoff) and/or experience with functional and formal verification tools/ methodology , VIP. Understanding of semiconductor manufacturing ... technology requirements in the digital , custom and function verification space, coordination of sales strategies and efforts across...in sales and account management or as a Applications Engineer or Design Engineer with proven track… more
- Meta (Austin, TX)
- …in support of our industry leading virtual and augmented reality systems.As a Design Verification Engineer (DVEs), you will be a key contributor in planning, ... industry leading virtual and augmented reality systems. **Required Skills:** Design Verification Engineer Responsibilities: 1. Self sufficient and detail… more
- NVIDIA (Hillsboro, OR)
- We are now looking for a CPU Design Methodology Engineer : The complexity of chip development has greatly increased over the years. We are now packing tens of ... NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design...and problem-solving skills + Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design… more
- NVIDIA (Santa Clara, CA)
- …how you can make a lasting impact on the world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation team. The team develops and ... supports static RTL verification methodologies for RTL Lint and Logical Equivalence. As...limits of technology and performance for GPU, CPU and SoC markets. What you'll be doing: + Evaluate new… more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ SoC verification … more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Meta (Sunnyvale, CA)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Microsoft Corporation (Austin, TX)
- …and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM). + Analyse and debug test failures ... coverage for stimulus and corner cases. + Develop, audit & execute the IP/Subsystem SoC level verification plan. + Close coverage to plug verification … more
- Microsoft Corporation (Mountain View, CA)
- …clients, and augmented reality. We are looking for a **Senior Design Verification Engineer ** to work on leading-edge Intellectual Property (IP) development ... and assertions to verify design correctness. + Develop Universal Verification Methodology (UVM) components to interface between...of experience in design verification with full verification cycle on complex System On Chip ( SOC… more