- Arrow Electronics (San Jose, CA)
- **Position:** STA Engineer **Job Description:** POSITION SUMMARY * Proven experience in constraints (Func/Test) handling, block and top level static timing ... on Automation (Perl/Tcl/Awk/Python) * Able to provide technical guidance to Junior Engineer * Good in communication skill EDUCATION BACKGROUND A Bachelor's degree in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer to enable ... basic understanding of Place and route, power analysis. Related tools/Keywords; PrimeTime, STA , Quantus #LI-MA1 The annual salary range for California is $138,600 to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to enable new and differentiating technologies.. + In this role, the Solutions Engineer (SE) is expected to work both independently and in collaboration with other ... team members to address customer issues and to identify new opportunities or Risk that are linked to those activities + The SE will interact with Product Engineering/RnD Team as well as Key Technologists at customer site to develop and enable new… more
- ManpowerGroup (San Jose, CA)
- …innovate in an unparalleled time to market. **You Are:** An experienced SoC Integration Engineer **The Work:** The ideal candidate can help along the design flow to ... DFT checks, support regression and release process and analyze STA timing results. **Here's what you need:** + A...+ A minimum of 3 years of experience with STA (Static Timing Analysis) and PrimeTime and related timing… more
- Qualcomm (San Jose, CA)
- …to ensure DFT DRCs are fixed. + Analyzing and meeting ATPG coverage goals + Owns STA constraints and work with STA team to resolve timing violations + owns IDDQ ... constraints generation and validation + Working independently in the team to solve problems, enable his team to deliver on time with high quality + Responsible for deliverables of certain aspects of SoC DFT execution + Responsible for pattern verification and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Compiler) + Experience with EDA tools in the IC digital implementation & signoff flows ( STA tools) + Strong STA and SDC debugging abilities are required. + Low ... power analysis, Clock design/analysis and hands-on 7/5nm technology node experience a plus. + Automation skills using Perl, Tcl and shell scripting essential + Strong analytical & analysis skills covering digital implementation is critical. + Proven track… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …level simulations to verify functionality. + Perform and help debug Synthesis/ STA scripts/constraints. + Participate in development of Application notes, Training ... + Verilog RTL design and gate level verification experience. + Synthesis and STA experience, back-end experience is a plus + Familiarity with industry standard DFT… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …EDA tools is required, ie; Genus, Design Compiler, Innovus, ICC2, Conformal, Tempus, STA , Static Timing Analysis, PrimeTime, Modus, and/or Voltus is highly desired + ... Experience in a scripting language such as TCL/Perl/Python + MS in EE or CE with 6-8 years' experience or BS with 8+ years' experience + Candidate should have strong customer-facing communication and problem solving skills + Strong personal drive for… more
- Integense (San Jose, CA)
- …+ Experienced in all Front and Back End activities - RTL, Verification, Synthesis, STA , DFT, ATPG, etc. + Adept with System Verilog, C, and various scripting ... languages. + Experience with, implementing, designing with, and testing standard interfaces (I2C/SPI/APB/AHB). + Excellent English written and verbal communication skills. Preferred Qualifications + Experience implementing embedded microcontrollers. +… more
- Google (Mountain View, CA)
- …Analysis. + Experience in high speed design timing convergence and in STA tools like Primetime or Tempus. Preferred qualifications: + Experience and understanding ... that power all of Google's services. As a Hardware Engineer , you design and build the systems that are...include setting up the timing constraints, defining the overall STA methodology, STA infrastructure and sign-off convergence… more