- SpaceX (Irvine, CA)
- Sr. SOC / ASIC Physical Verification Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Irvine, CA)
- SOC / ASIC Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SOC / ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...timing closure + Work closely with chip architecture, design verification , physical design, DFT, and power teams… more
- SpaceX (Irvine, CA)
- …SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design, and verification + RTL experience to understand, trace and ... Sr. ASIC / SOC DFT Engineer (Silicon Engineering) at...evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools +… more
- SpaceX (Irvine, CA)
- ASIC Emulation Verification Engineer (Silicon Engineering)...based emulation in finding pre-silicon bugs at subsystem and SoC levels + Port ASIC and IP ... the ultimate goal of enabling human life on Mars. ASIC EMULATION VERIFICATION ENGINEER (SILICON ENGINEERING) At...time, time to waveforms) COMPENSATION & BENEFITS: Pay range: SOC Emulation Verification Engineer/Level I: $120,000.00 -… more
- SpaceX (Irvine, CA)
- …phases of ASIC and/or FPGA design flow (eg synthesis, timing closure, verification ) + Work with ASIC backend/implementation teams as needed + Bring-up and ... FPGA/ ASIC Design Engineer (Silicon Engineering) at SpaceX Irvine,...digital ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks +… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer, DDR IP (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER, DDR IP (SILICON ENGINEERING) At SpaceX...quality release of the Memory Controller IP for SpaceX SoC designs, including triaging release/integration issues into IP defects… more
- SpaceX (Irvine, CA)
- …make this possible, with the ultimate goal of enabling human life on Mars. SOC / ASIC PHYSICAL DESIGN STA/TIMING ENGINEER (SILICON ENGINEERING) At SpaceX we're ... SOC Physical Design STA/Timing Engineer (Silicon... design flow + Work with systems and architecture, SOC integration, verification , DFT, mixed signal, IP… more