- Mastech Digital, Inc. (Phoenix, AZ)
- …methodology improvements.- Perform comprehensive power analysis in vector and vector-less modes of ASIC SoC design.Here's what you need:- A minimum of three ... Work across the entire silicon design lifecycle, including system architecture, design verification , RTL digital design, physical design, design for test (DFT),… more
- Amazon (Redmond, WA)
- …Kuiper team is looking for a Sr. Technical Program Manager with experience in ASIC / SOC and FPGA development, project management, and program management. The role ... this role you will: - Collaborate with engineering leaders ( SOC / ASIC leads) to create project...phases of Silicon development from architecture definition, RTL design, Verification , IP design, Physical design, post silicon… more
- SpaceX (Sunnyvale, CA)
- SOC / ASIC Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SOC / ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...timing closure + Work closely with chip architecture, design verification , physical design, DFT, and power teams… more
- Qualcomm (San Diego, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... efficiency. **Qualifications:** + Minimum 3 years of DV experience using uvm/assertion based verification technologies + Experience in verifying complex SOC or … more
- Qualcomm (San Diego, CA)
- …working knowledge in the entire low power, high performance ASIC / SoC design flows (micro-architecture, RTL design, verification , synthesis, timing/STA, UPF, ... XR space. An ideal candidate will oversee definition, design, verification , and documentation for ASIC development for...CLP, LEC formal verification , DFT, physical design.) + Must have Hands-on experience in writing… more
- SpaceX (Irvine, CA)
- …phases of ASIC and/or FPGA design flow (eg synthesis, timing closure, verification ) + Work with ASIC backend/implementation teams as needed + Bring-up and ... FPGA/ ASIC Design Engineer (Silicon Engineering) at SpaceX Irvine,...digital ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks +… more
- Amazon (Sunnyvale, CA)
- …in machine learning, computer vision and robotics. You will work closely with scientists, SoC Architects, software and verification to develop IP that meets the ... IP in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional SOC...registers, and error handling. - Experience working closely with physical design teams to develop highly optimized ASICs with… more
- Qualcomm (San Diego, CA)
- … Design Verification Engineer with strong CPU, ASIC design and verification fundamentals to work in Qualcomm's Global SOC team. This position offers the ... **The JOB** + As a member of the Global SOC Lower Power verification team, you will...Science, Engineering, or related field and 6+ years of ASIC design, verification , validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- …the clocks design. + Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve ... The Team is responsible for crafting all aspects of SOC clocking. The team collaborates with the front end...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- …cryogenic operation and radiation hardening. + Floor planning, layout design and physical verification of active circuits. + Top-level simulations to validate ... ASIC Design Engineer Job ID 5683 Location SLAC...CAD toolsfor schematic entry, simulation, and layout design, including physical verification and top-level integration. + Solid… more
- SpaceX (Sunnyvale, CA)
- Sr. ASIC Design Engineer, DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER, DDR IP (SILICON ENGINEERING) At SpaceX...quality release of the Memory Controller IP for SpaceX SoC designs, including triaging release/integration issues into IP defects… more
- Amazon (Seattle, WA)
- …company DNA. As part of a project team you will work alongside Senior ASIC Engineers; supporting the design, debug, validation and optimization of the products. You ... Some positions may require international travel. Key job responsibilities As an ASIC Engineer you will engage with an experienced cross-disciplinary staff to… more
- Meta (Sunnyvale, CA)
- …or power methodology development 12. 5. Logic synthesis and optimization 13. 6. Physical Design (ECO) and 14. 7. Hardware/ ASIC lab debug and bring ... click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Work on architecture exploration and micro-architecture… more
- Micron Technology, Inc. (Minneapolis, MN)
- …and groundbreaking technology while rapidly growing your abilities. As our Staff ASIC Digital Synthesis Engineer role, you will contribute to the development of ... multidimensional designs involving the physical synthesis of complex integrated circuits. You will also...design optimization, ECOs, etc. + Test design using formal verification tools and functional verification environment. +… more
- NVIDIA (Austin, TX)
- NVIDIA is looking for top Senior ASIC Design Engineers to join our world class System-On-Chip engineering team, developing the industry's most complicated GPUs with ... standard scripting languages (Perl, Make, Python) + Interface directly with unit-level, Physical Design, CAD, Package Design, Software, DFT and other teams What we… more
- Qualcomm (San Diego, CA)
- …candidate will work with frontend RTL, DFT, Synthesis, Design Verification and Physical Design teams during the SoC development. Also the candidate will have ... ASIC frontend development + Logic design, RTL coding, verification , synthesis, and timing closure + Hardware description languages...verification in validating low power design featurs at SoC and IP level. + Collaborate with company CAD… more
- Amazon (Sunnyvale, CA)
- …you will interface with cross-functional engineering and program/product management teams to develop ASIC / SOC solutions that will go into Amazon Devices. In this ... role you will: - Collaborate with engineering leaders ( SOC / ASIC leads) to create project...of Silicon development which are architecture definition, RTL design, Verification , IP design, Physical design, post silicon… more
- Qualcomm (Santa Clara, CA)
- …**Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** A SOC Physical Design Engineer plays a crucial role in the ... understanding of timing closure, clock tree synthesis, power optimization, and physical verification methodologies. Additionally, communication skills and the… more
- Google (Sunnyvale, CA)
- …design. + Experience with silicon, emulation, FPGA validation and debug, functional verification , physical design, and DFT methodologies. + Experience with ... You will own deliverables to the cross-functional teams (eg, Physical Design, Verification , Validation, etc.) at various...the planning, creation, and delivery of top-level RTL/deliverables for ASIC and SOC projects from concept to… more
- NVIDIA (Santa Clara, CA)
- …will be cross-disciplinary, working with software, ASIC design, verification , physical design, VLSI and platform teams. Our SoC architects excel at ... We are now looking for a Senior Hardware SoC Architect for our Tegra team! Do you...validation plan and execution. + Review downstream specifications and verification plans in ASIC , software and/or platform… more
