• Sr . Synthesis & Front-End STA…

    SpaceX (Sunnyvale, CA)
    Sr . Synthesis & Front-End STA Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... enabling human life on Mars. SR . SOC/ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON ENGINEERING)...critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer / Senior :… more
    SpaceX (02/08/24)
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  • Sr . Software Engineer - High Level…

    Siemens Digital Industries Software (Fremont, CA)
    …& Development **Req ID:** 383049 Company: Siemens Job Title: Sr . Software Engineer - High Level Synthesis Job Reference #: 383049 Job Location: Fremont, ... targeted for FPGAs (https://en.wikipedia.org/wiki/FPGA) and ASICs (https://en.wikipedia.org/wiki/ Application -specific\_integrated\_circuit) . https://eda.sw.siemens.com/en-US/ic/ic-design/high-level- synthesis -and-verification-platform/ Catapult… more
    Siemens Digital Industries Software (04/17/24)
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  • Sr . ASIC Design Engineer , DDR IP…

    SpaceX (Sunnyvale, CA)
    Sr . ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER , DDR IP (SILICON...critical milestones COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
    SpaceX (03/29/24)
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  • Sr . SOC Physical Design STA/Timing…

    SpaceX (Sunnyvale, CA)
    Sr . SOC Physical Design STA/Timing Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC PHYSICAL DESIGN STA/TIMING ENGINEER (SILICON...CA COMPENSATION & BENEFITS: Pay range: Physical Design STA/Timing Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
    SpaceX (02/21/24)
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  • Sr . FPGA/ASIC Design Engineer

    SpaceX (Sunnyvale, CA)
    Sr . FPGA/ASIC Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... the ultimate goal of enabling human life on Mars. SR . FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At...new skills COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
    SpaceX (02/01/24)
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  • Sr Staff Engineer , Digital…

    ThermoFisher Scientific (Pleasanton, CA)
    **Job Description** **Job Description Sr Staff Engineer , Digital Automation** When you're part of the team at Thermo Fisher Scientific, you'll do important work, ... needed. **How will you make an impact** ? The Sr Staff Digital Automation Engineer is a...CMMS, LIMS, etc + Experience with large/small scale Oligo synthesis , purification, and analysis preferred. **Knowledge, Skills, Abilities** +… more
    ThermoFisher Scientific (03/30/24)
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  • Sr . ASIC/SOC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    Sr . ASIC/SOC DFT Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... the ultimate goal of enabling human life on Mars. SR . ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At...weekends as needed COMPENSATION & BENEFITS: Pay range: DFT Engineer / Senior : $170,000.00 - $230,000/per year Your actual… more
    SpaceX (02/08/24)
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  • Sr . ML Architect

    Amazon (Sunnyvale, CA)
    …Amazon Devices is an inventive research and development company that designs and engineer high-profile devices like the Kindle family of products, Fire Tablets, Fire ... 3+ years of building machine learning models for business application experience - Experience programming in Java, C++, Python...in HDL like Verilog, VHDL or HLS (High Level Synthesis ) Amazon is committed to a diverse and inclusive… more
    Amazon (03/20/24)
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  • Senior Silicon Engineer

    Microsoft Corporation (Mountain View, CA)
    …sites within the Microsoft silicon engineering organization. We are looking for a ** Senior Silicon Engineer ** to join our team! **Microsoft's mission is to ... making across UPF (Unified Power Format)/Low Power methodology/architecture, DFT methodology, Synthesis , Place and Route and Extracted Timing model generation in… more
    Microsoft Corporation (04/23/24)
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  • Senior Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …high-performance functions in an extremely efficient manner. We are looking for a ** Senior Design Engineer ** to work in the dynamic Microsoft Artificial ... team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are… more
    Microsoft Corporation (02/21/24)
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  • Senior RTL to GDS Principal…

    Cadence Design Systems, Inc. (San Jose, CA)
    …or explore sales/marketing career opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your ... technology. We are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field Applications Team. Working… more
    Cadence Design Systems, Inc. (04/19/24)
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  • Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    The Microsoft Silicon Engineering and Solutions Team is looking to hire a ** Senior Silicon Engineer ** to join our Central Front-End Tools, Flows and Methodology ... VIP Design) , Design Verification, Validation, Design for testing (DFT), Emulation, Design Synthesis , RTL Power Analysis, Physical Design ( PD) Handoff and System on… more
    Microsoft Corporation (02/06/24)
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  • Senior Implementation Methodology…

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... responsible for all aspects of front-end design implementation methodologies ( synthesis , formal-equivalence-checking), flow automation and application support. +… more
    NVIDIA (03/13/24)
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  • Senior Physical Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Physical Design Engineer ** to work on leading edge Intellectual Property ... of experience in hardware design. + 4+ years of experience in synthesis , timing constraints and timing closure, front-end design checks, place-and-route and PPA… more
    Microsoft Corporation (03/20/24)
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  • Senior RTL to GDS Principal…

    Cadence Design Systems, Inc. (San Jose, CA)
    …technology. We are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field Applications Team. Working ... with IC digital implementation flows and font-end EDA tools including Synthesis , DFT, and Logical Equivalence CheckingPrior experience with Cadence tools such… more
    Cadence Design Systems, Inc. (04/27/24)
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  • Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …(DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Silicon Engineer . You will join our front-end silicon team and ... high performance, low power, scalable and programmable DPU silicon. **Responsibilities** + As a Senior Silicon Engineer in the Data Processing Unit team you will… more
    Microsoft Corporation (04/11/24)
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  • Senior Physical Design Applications…

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Principal Application Engineer responsible for providing pre-sales and post-sales technical support for ... 3DIC. + Working with customers in one or more of the following areas: Synthesis , Place and Route, timing and power signoff. + Understanding and proliferating Cadence… more
    Cadence Design Systems, Inc. (04/13/24)
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  • RTL Senior Principal Digital Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …and will be able to collaborate successfully as needed with the digital, analog and application teams. Candidate should be willing to work full time in the San Jose ... of Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development + Understanding… more
    Cadence Design Systems, Inc. (03/01/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …the finite-precision models into ASIC hardware using SystemC/C++ for HLS(High-Level Synthesis ) as the primary hardware description language that meet the area ... designs in stand-alone and integrated with the system . Synthesis and gate-level timing tasks related to the designed...of work experience in a role requiring interaction with senior leadership (eg, Director level and above). **Principal Duties… more
    Qualcomm (03/04/24)
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  • Staff SOC Physical Design Engineer

    Qualcomm (Santa Clara, CA)
    …Engineering Group > ASICS Engineering **General Summary:** A SOC Physical Design Engineer plays a crucial role in the development and implementation of products ... processes, and an understanding of timing closure, clock tree synthesis , power optimization, and physical verification methodologies. Additionally, communication… more
    Qualcomm (04/12/24)
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